• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.170-175
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• 2005

Generally, Aluminum is superior to durability, light, and characteristics of the material are embossed luminant. So, these characteristics of aluminum will be used automobile interior parts by aluminum injection moulding. Especially, The external of Aluminum plate is engraved differing pattern by roller working. This working can use any longer and be seen gracefully. This is the reason why aluminum insert moulding is used. This feature of research can be characterized by simple process to customize aluminum sheet of blanking and forming process with internal parts of configuration if products are injected by aluminum sheet. Besides, to analysis completed Automobile interior parts to be concerned volumetric shrinkage, best gate location, fill time analysis and so on through the mold-flow before the aluminum insert moulding is worked.

• Journal of Biosystems Engineering
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• v.43 no.4
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• pp.420-425
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• 2018

Purpose: Chemical fertilizers contribute to agricultural productivity. Annually, 450,000 tons of chemical fertilizers are used in Korea, which is 268 kg per hectare (MAFRA, 2016). However, excessive use causes problems such as environmental pollution and soil acidification. This study proposes use conditions for a fertilizer distributor that can reduce excessive fertilization by analyzing distribution patterns. Methods: This study analyzed fertilizer application uniformity according to the number of blades on a centrifugal fertilizer distributor (three or four blades), orifice gate open ratio (50 or 100%), and blade rotation speed (400, 500, or 600 rpm). Results: When using four blades, the coefficient of variation (CV) was lower than when using three by 11-13% points, and the CV using the 50% open ratio was 10-30% points lower than using the 100% open ratio. The CV at 500 rpm blade rotating speed was 9-12% points lower than that for 400 and 600 rpm. Conclusions: The CV with four blades, 50% orifice gate open ratio, and 500 rpm of blade rotating speed was 18.4%, which provided the most uniform fertilization.

• Journal of the Korean Institute of Navigation
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• v.21 no.1
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• pp.1-11
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• 1997

Because of the sharp increase of its export and import container cargo volumes contrast to the lack of related Container Terminal facility, equipment and inefficient procedure, there is now heavy container cargo congestions in Pusan Container Terminal. As a result of such a situation, many container ships avoid their calls into Pusan port. This is a major cause that in tum kads to weakening intemational competitiveness of the Korean industry. This study, therefore, aims are to make a quantitative analysis of Container Terminal System through the computer simulation, especially focusing on its 4 sub-system of a handling system, 'it is checked whether the current operation is being performed effectively through the computer simulation. The overall findings are as folIows; Firstly, average tonnage of the ships visiting the BCTOC was 32,360 G/T in from January '96, to may '96. The average arrival interval and service time of container ships at BCTOC are 5.63 hours and 18.67 hours respectively. Ship's arrival and service pattern at BCTOC was exponential distribution with 95% confidence and Erlang-4 distribution with 99% confidence. Secondly, average waiting time and number of ships was 9.9 hours, 235 ships(38%) among 620 ships. Number of stevedoring container per ship was average 747.7 TED, standard deviation 379.1 TEU and normal distribution with 99% confidence. Thirdly, from the fact that the average storage days of containers at BCTOC are 2.75 days (3.0 days when import, 2.5 days when export). it is founds that most containers were transfered to the off-dock storage areas with the free periods(5 days when import, 4 days when export), the reason for which is considered to be the insufficient storage area at BCTOC. Fourthly, in the case of gate in-out at BCTOC, occupied containers and emptied containers are 89% and 11% respectively in the gate-in, 75% and 25% seperately in the gate-out. Finally, from the quantitative analysis results for container terminal at BCTOC, ship's average wating time of ships was found to be 20.77 hours and berth occupancy rate(${\rho}$) was 0.83. 5~6 berths were required in order that the berth occupancy rate(${\rho}$) may be maintained up to 60% degree.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Journal of The Korean Society of Agricultural Engineers
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• v.65 no.1
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• pp.73-81
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• 2023

To understand salinity status of fresh water and paddy soils and the susceptibility of rice to salinity stress of Gunnae reclaimed tidelands, salinity monitoring was conducted in rainy and dry seasons. For fresh water, a high salinity was observed at the sampling location near the sluice gate and decreased with distance from the gate. This spatial pattern of fresh water salinity indicates the necessity of spatial distribution of salinity in the assessment of salinity status of fresh water. Interestingly, there was significant correlation between rainfall amount and salinity, implying that salinity of fresh water varies with rainfall and thus it may be possible to predict salinity of water using rainfall. Soil salinity also higher near the gate, reflecting the influence of high saline water. In addition, the groundwater salinity also high to threat rice growth. Though soil salinity status indicated low possibility of sodium injury, there was changes in soil salinity status during the course of rice growth, suggesting that more intensive monitoring of soil salinity may be necessary for soil salinity assessment. Our study suggests the necessity of intensive salinity monitoring to understand the spatio-temporal variations of salinity of water and soil of reclaimed tideland areas.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.3
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• pp.943-950
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• 2010

A secure entrance system is complicated because it should have various functions like monitoring, logging, tracing, authentication, authorization, staff locating, managing staff enter-and-leave, and gate control. In this paper, we built and applied a secure entrance system for a domestic nuclear plant using Aspect Oriented Programming(AOP) and design pattern. Using AOP has an advantage of clearly distinguishing the role for each functional module because building a system separated independently from the system's business logic and security logic is possible. It can manage system alternation flexibility by frequent change of external environment, building a more flexible system based on increased code reuse, efficient functioning is possible which is an original advantage of AOP. Using design pattern enables to design by structuring the complicated problems that arise in general software development. Therefore, the safety of the system can also be guaranteed.

• Journal of Advanced Navigation Technology
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• v.17 no.5
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• pp.560-567
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• 2013

In this paper, it is proposed the fault detection method of the ASIC, without the Test Requirement Document(TRD), extracting internal logic circuit and analyzed the function of the ASIC using the multipurpose development program and simulation. If there don't have the TRD, it is impossible to analyze the operation of the circuit and find out the fault detection in any chip. Therefore, we make the TRD based on the analyzed logic data of the ASIC, and diagnose of the ASIC circuit at the gate level through the signal control of I/O pins using the Dynamic Pattern signal. According to the experimental results of the proposed method, we is confirmed the good performance of the fault detection capabilities which applied to the non-memory circuit.

• Smart Structures and Systems
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• v.8 no.1
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• pp.39-52
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• 2011

We are developing a biomimetic robot based on the Sea Lamprey. The robot consists of a cylindrical electronics bay propelled by an undulatory body axis. Shape memory alloy (SMA) actuators generate propagating flexion waves in five undulatory segments of a polyurethane strip. The behavior of the robot is controlled by an electronic nervous system (ENS) composed of networks of discrete-time map-based neurons and synapses that execute on a digital signal processing chip. Motor neuron action potentials gate power transistors that apply current to the SMA actuators. The ENS consists of a set of segmental central pattern generators (CPGs), modulated by layered command and coordinating neuron networks, that integrate input from exteroceptive sensors including a compass, accelerometers, inclinometers and a short baseline sonar array (SBA). The CPGs instantiate the 3-element hemi-segmental network model established from physiological studies. Anterior and posterior propagating pathways between CPGs mediate intersegmental coordination to generate flexion waves for forward and backward swimming. The command network mediates layered exteroceptive reflexes for homing, primary orientation, and impediment compensation. The SBA allows homing on a sonar beacon by indicating deviations in azimuth and inclination. Inclinometers actuate a bending segment between the hull and undulator to allow climb and dive. Accelerometers can distinguish collisions from impediment to allow compensatory reflexes. Modulatory commands mediate speed control and turning. A SBA communications interface is being developed to allow supervised reactive autonomy.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.110-119
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• 2017

This paper describes a CMOS image sensor (CIS) with dual correlated double sampling (CDS) and column-parallel analog-to-digital converter (ADC) and its measurement method using a field-programmable gate array (FPGA) integrated module. The CIS is composed of a $320{\times}240$ pixel array with $3.2{\mu}m{\times}3.2{\mu}m$ pixels and column-parallel 10-bit single-slope ADCs. It is fabricated in a $0.11-{\mu}m$ CIS process, and consumes 49.2 mW from 1.5 V and 3.3 V power supplies while operating at 6.25 MHz. The measured dynamic range is 53.72 dB, and the total and column fixed pattern noise in a dark condition are 0.10% and 0.029%. The maximum integral nonlinearity and the differential nonlinearity of the ADC are +1.15 / -1.74 LSB and +0.63 / -0.56 LSB, respectively.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.3
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• pp.131-136
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• 1990

In this paper, new methods are proposed which speed up the logical redundancy identification for the gate-level logic optimization. Redundancy indentification, as well as deterministic test pattern generation, can be viewed as a finite space search problem, of which execution time depends on the size of the search space. For the purpose of efficient search, we propose dynamic head line and mandatory assignment. Dynamic head lines are changed dynamically in the process of the redundancy identification. Mandatory assignement can avoid unnecessary assignment. They can reduce the search size efficiently. Especially they can be used even though the circuit is modified in the optimization procedure, that is different from the test pattern generation methods. Some experimental results are presented indicating that the proposed methods are faster than existing methods.