• Title/Summary/Keyword: Gate Operation

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A SOI Lateral Hybrid BMFET with High Current Gain (높은 전류 이득률을 갖는 SOI 수평형 혼성 BMFET)

  • Kim, Du-Yeong;Jeon, Jeong-Hun;Kim, Seong-Dong;Han, Min-Gu;Choe, Yeon-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.2
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    • pp.116-119
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    • 2000
  • A hybrid SOI bipolar-mode field effect transistor (BMFET) is proposed to improve the current gain. The device characteristics are analyzed and verified numerically for BMFET mode, DMOS mode, and hybrid mode by MEDICI simulation. The proposed SOI BMFET exhibits 30 times larger current gain in hybrid-mode operation by connecting DMOS gate to the p+ gate of BMFET structure as compared with the conventional structure without sacrifice of breakdown voltage and leakage current characteristics. This is due to the DMOS-gate-induced hybrid effect that lowers the barrier of p-body and reduces the charge in p-body.

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The design to the periphery circuit for operaton and characteristic assessment of the Nano Floating Gate Memory (Nano Floating Gate Memory 의 동작 및 특성 평가를 위한 주변회로 설계)

  • Park, Kyung-Soo;Choi, Jae-Won;Kim, Si-Nae;Yoon, Han-Sub;Kwack, Kae-Dal
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.647-648
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    • 2006
  • This paper presents the design results of peripheral circuits of non-volatile memory of nano floating gate cells. The designed peripheral circuits included command decoder, decoders, sense amplifiers and oscillator, which are targeted with 0.35um technology EEPROM process for operating test and reliable test. The simulation results show each operation and test mode of output voltage for word line, bit line, well and operating of sense amplifier.

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Optimal Design of Hydraulic System Using the Complex Method (컴플렉스법에 의한 유압시스템의 최적 설계)

  • Lee S.R.;Lee Y.B.;Park J.H.
    • Transactions of The Korea Fluid Power Systems Society
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    • v.1 no.4
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    • pp.1-8
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    • 2004
  • The optimum design parameters of several hydraulic systems are obtained using the complex method that is one kind of constrained direct search method. First, the parameters of lead-lag controller of the direct drive servovalve is designed using the complex method to satisfy the steady-state error requirement. Second, the optimum locating point of hydraulic cylinder Is determined to minimize the cylinder force in the operation range of rotational sluice gate. For the third application case, the optimum piston area of hydraulic cylinder is determined to minimize the man power to elevate the manually operated sluice gate.

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Device Characteristics of GaN MESFET with the maximum frequency of 10 GHz (최대추파 10 GHz GaN MESFET의 소자특성)

  • 이원상;정기웅;문동찬;신무환
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.497-500
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    • 1999
  • This paper reports on the fabrication and characteristics of recessed gate GaN MESFETs fabricated using a photoelectrochemical wet etching method. The unique etching process utilizes photo-resistive mask and KOH based etchant. GaN MESFETs with successfully recessed gate structure was characterized in terms of dc and RF performance. The fabricated GaN MESFET exhibits a current saturation at $V_{DS}$ = 4 V and a pinch-off at $V_{GS}$ =-3V The peak drain current of the device is about 230mA/mm at 300 K and the value is remained almost same for 500K operation. The $f_{T}$ and $f_{max}$ from the device are 6.357Hz and 10.25 GHz, respectively.y.y.

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Effect of Differential Pressure on the Performance of Motor Operated Flexible Wedge Gate Valve (차압이 모터구동 Flexible Wedge형 게이트밸브의 성능에 미치는 영향)

  • Kim, Dae-Woong;Yoo, Seong-Yeon
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.31 no.2 s.257
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    • pp.151-158
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    • 2007
  • The mechanism of power transmission from motor torque to stem thrust and the operation characteristic of each stroke position are analyzed using the diagnostic signal, and effects of differential pressure on the performance of motor operated flexible wedge gate valve are investigated. Test facility consists of 76 mm motor operated valve(flexible wedge type), pump and pipe system. Static and dynamic test are performed separately, and two differential pressure conditions are applied in the dynamic test. To evaluate the performance of valve, test signals for the torque, thrust, current, voltage and stroke length are acquired by using UDS which is diagnosis device for motor operated valve, and each diagnostic signal is analyzed and compared. The characteristic of valve performance factors such as stem factor, rate of loading, valve factor, are evaluated, and these factors are found to be severely influenced by the fluid differential pressure.

Reverse-Conducting IGBT Using MEMS Technology on the Wafer Back Side

  • Won, Jongil;Koo, Jin Gun;Rhee, Taepok;Oh, Hyung-Seog;Lee, Jin Ho
    • ETRI Journal
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    • v.35 no.4
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    • pp.603-609
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    • 2013
  • In this paper, we present a 600-V reverse conducting insulated gate bipolar transistor (RC-IGBT) for soft and hard switching applications, such as general purpose inverters. The newly developed RC-IGBT uses the deep reactive-ion etching trench technology without the thin wafer process technology. Therefore, a freewheeling diode (FWD) is monolithically integrated in an IGBT chip. The proposed RC-IGBT operates as an IGBT in forward conducting mode and as an FWD in reverse conducting mode. Also, to avoid the destructive failure of the gate oxide under the surge current and abnormal conditions, a protective Zener diode is successfully integrated in the gate electrode without compromising the operation performance of the IGBT.

New Switching Pattern for the Paralleling of SRM Low Voltage Inverter (저전압형 SRM 인버터의 병렬운전 위한 새로운 스위칭)

  • 이상훈;박성준;원태현;안진우;이만형
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.53 no.6
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    • pp.359-367
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    • 2004
  • The switched reluctance motor(SRM) has considerable potential for industrial applications because of its high result lily as a result of the absence of rotor windings. In some applications with SRM, paralleling strategy is often used for cost saving, increasing of current capacity and system reliability. A SRM inverter has very low ,switching frequency. This results in reducing the burden for a high-speed of the gate-amp interface circuit. and the linearity of optocoupler is used to protect the instantaneous peak current for the stable operation. In this paper, series resistor is used to equal the current sharing of each switching device and a linear gate-amp is proposed to protect the instantaneous peak current which occurs in transient state. The proposed paralleling strategy is verified by experimental results.

A New IGBT Gate Driver for Hard Switching Inverter (하드 스위칭 인버터를 위한 새로운 IGBT용 게이트 드라이버)

  • Jung, Y.C.;Kim, H.S.;Jeong, J.H.;Lee, B.W.;Cho, Gyu-Hyeong
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.746-748
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    • 1993
  • To overcome the problem of the diode reverse recovery in high switching frequency inverter, a new gate drive scheme is proposed for IGBT in this paper. Using this circuit, the reverse recovery current can be controlled and faster switching time can be achieved for hard switching inverter. The over-current protection method, which is suitable for the proposed gate driver, is also presented. The operation of the proposed circuit is investigated and its usefulness is verified through the experimental results.

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Characteristics of Double Polarity Source-Grounded Gate-Extended Drain NMOS Device for Electro-Static Discharge Protection of High Voltage Operating Microchip (마이크로 칩의 정전기 방지를 위한 DPS-GG-EDNMOS 소자의 특성)

  • Seo, Yong-Jin;Kim, Kil-Ho;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.97-98
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    • 2006
  • High current behaviors of the grounded gate extended drain N-type metal-oxide-semiconductor field effects transistor (GG_EDNMOS) electro-static discharge (ESD) protection devices are analyzed. Simulation based contour analyses reveal that combination of BJT operation and deep electron channeling induced by high electron injection gives rise to the 2-nd on-state. Thus, the deep electron channel formation needs to be prevented in order to realize stable and robust ESD protection performance. Based on our analyses, general methodology to avoid the double snapback and to realize stable ESD protection is to be discussed.

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All-Optical Binary Full Adder Using Logic Operations Based on the Nonlinear Properties of a Semiconductor Optical Amplifier

  • Kaur, Sanmukh;Kaler, Rajinder-Singh;Kamal, Tara-Singh
    • Journal of the Optical Society of Korea
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    • v.19 no.3
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    • pp.222-227
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    • 2015
  • We propose a new and potentially integrable scheme for the realization of an all-optical binary full adder employing two XOR gates, two AND gates, and one OR gate. The XOR gate is realized using a Mach-Zehnder interferometer (MZI) based on a semiconductor optical amplifier (SOA). The AND and OR gates are based on the nonlinear properties of a semiconductor optical amplifier. The proposed scheme is driven by two input data streams and a carry bit from the previous less-significant bit order position. In our proposed design, we achieve extinction ratios for Sum and Carry output signals of 10 dB and 12 dB respectively. Successful operation of the system is demonstrated at 10 Gb/s with return-to-zero modulated signals.