• Title/Summary/Keyword: Gate Operation

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An experimental study on the discharge characteristics of underflow type floating vertical lift gate at free-flow condition (부력식 연직수문의 자유흐름 상태에서 하단방류 특성에 관한 실험적 연구)

  • Han, Il Yeong;Choi, Heung Sik;Lee, Ji Haeng;Ra, Sung Min
    • Journal of Korea Water Resources Association
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    • v.51 no.5
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    • pp.405-415
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    • 2018
  • Hydraulic variables such as discharge coefficient, gate opening, and upstream water depth are required to calculate the discharge of vertical lift gate. It is very important for a precise gate design, because it may affect the rest, to predict the behavior of gate opening during operation. In this study, an equation by which gate opening could be predicted with any upstream water depths was derived from the relation between the calculated value from buoyancy theory and measured one from experiment for a floating gate model. Downpull force was the reason for the differences between the calculated and the measured and it was verified using pressure coefficient. Also, the relation of discharge coefficient with gate opening ratios was derived. The derived relations were used for flood routing and it was realized that downpull force effect should be fully taken into account during gate design.

Characteristics of Nanowire CMOS Inverter with Gate Overlap (Gate Overlap에 따른 나노선 CMOS Inverter 특성 연구)

  • Yoo, Jeuk;Kim, Yoonjoong;Lim, Doohyeok;Kim, Sangsig
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.10
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    • pp.1494-1498
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    • 2017
  • In this study, we investigate the influence of an overlap between the gate and source/drain regions of silicon nanowire (SiNW) CMOS (complementary metal-oxide-semiconductor) inverter on bendable plastic substrates and describe their electrical characteristics. The combination of n-channel silicon nanowire field-effect transistor (n-SiNWFET) and p-channel silicon nanowire field-effect transistor (p-SiNWFET) operates as an inverter logic gate. The gains with a drain voltage ($V_{dd}$) of 1 V are 3.07 and 1.21 for overlapped device and non-overlapped device, respectively. The superior electrical characteristics of each of the SiNW transistors including steep subthreshold slopes and the high $I_{on}/I_{off}$ ratios are major factors that enable the excellent operation of the logic gate.

Dual-Gate Surface Channel 0.1${\mu}{\textrm}{m}$ CMOSFETs

  • Kwon, Hyouk-Man;Lee, Yeong-Taek;Lee, Jong-Duk;Park, Byung-Gook
    • Journal of Electrical Engineering and information Science
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    • v.3 no.2
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    • pp.261-266
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    • 1998
  • This paper describes the fabrication and characterization of dual-polysilicon gated surface channel 0.1$\mu\textrm{m}$ CMOSFETs using BF2 and arsenic as channel dopants. We have used and LDD structure and 40${\AA}$ gate oxide as an insulator. To suppress short channel effects down to 0.1$\mu\textrm{m}$ channel length, shallow source/drain extensions implemented by low energy implantation and SSR(Super Steep Retrograde) channel structure were used. The threshold voltages of fabricated CMOSFETs are 0.6V. The maximum transconductance of nMOSFET is 315${\mu}$S/$\mu\textrm{m}$, and that of pMOSFET is 156 ${\mu}$S/$\mu\textrm{m}$. The drain saturation current of 418 ${\mu}$A/$\mu\textrm{m}$, 187${\mu}$A/$\mu\textrm{m}$ are obtained. Subthreshold swing is 85mV/dec and 88mV/dec, respectively. DIBL(Drain Induced Barrier Lowering) is below 100mV. In the device with 2000${\AA}$ thick gate polysilicon, depletion in polysilicon near the gate oxide results in an increase of equivalent gate oxide thickness and degradation of device characteristics. The gate delay time is measured to be 336psec at operation voltage of 2V.

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LDO regulator with improved regulation characteristics using gate current sensing structure (게이트 전류 감지 구조를 이용한 향상된 레귤레이션 특성의 LDO regulator)

  • Jun-Mo Jung
    • Journal of IKEEE
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    • v.27 no.3
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    • pp.308-312
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    • 2023
  • The gate current sensing structure was proposed to more effectively control the regulation of the output voltage when the LDO regulator occurs in an overshoot or undershoot situation. In a typical existing LDO regulator, the regulation voltage changes when the load current changes. However, the operation speed of the pass transistor can be further improved by supplying/discharging the gate terminal current in the pass transistor using a gate current sensing structure. The input voltage of the LDO regulator using the gate current sensing structure is 3.3 V to 4.5 V, the output voltage is 3 V, and the load current has a maximum value of 250 mA. As a result of the simulation, a voltage change value of about 12 mV was confirmed when the load current changed up to 250 mA.

Organic Thin Film Transistors with Gate Dielectrics of Plasma Polymerized Styrene and Vinyl Acetate Thin Films

  • Lim, Jae-Sung;Shin, Paik-Kyun;Lee, Boong-Joo
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.95-98
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    • 2015
  • Organic polymer dielectric thin films of styrene and vinyl acetate were prepared by the plasma polymerization deposition technique and applied for the fabrication of an organic thin film transistor device. The structural properties of the plasma polymerized thin films were characterized by Fourier-transform infrared spectroscopy, X-ray diffraction, atomic force microscopy, and contact angle measurement. Investigation of the electrical properties of the plasma polymerized thin films was carried out by capacitance-voltage and current-voltage measurements. The organic thin film transistor device with gate dielectric of the plasma polymerized thin film revealed a low operation voltage of −10V and a low threshold voltage of −3V. It was confirmed that plasma polymerized thin films of styrene and vinyl acetate could be applied to functional organic thin film transistor devices as the gate dielectric.

A MOSFET's Driver Applied to High-frequency Switching with Wide Range of Duty Cycles

  • Zhang, Zhao;Xie, Shaojun
    • Journal of Power Electronics
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    • v.15 no.5
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    • pp.1402-1408
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    • 2015
  • A MOSFET's gate driver based on magnetic coupling is investigated. The gate driver can meet the demands in applications for wide range of duty cycles and high frequency. Fully galvanic isolation can be realized, and no auxiliary supply is needed. The driver is insensitive to the leakage inductor of the isolated transformer. No gate resistor is needed to damp the oscillation, and thus the peak output current of the gate driver can be improved. Design of the driving transformer can also be made more flexible, which helps to improve the isolation voltage between the power stage and the control electronics, and aids to enhance the electromagnetic compatibility. The driver's operation principle is analyzed, and the design method for its key parameters is presented. The performance analysis is validated via experiment. The disadvantages of the traditional magnetic coupling and optical coupling have been conquered through the investigated circuit.

Analysis of Small reservoir system by Flood control ability augmentation (치수능력 증대에 따른 저수지시스템 분석)

  • Park Ki-Bum;Lee Soon-Tak
    • Journal of Environmental Science International
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    • v.14 no.11
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    • pp.995-1004
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    • 2005
  • As a research establish reservoir safety operation for small dam systems. This study presents hydrologic analysis conducted in the Duckdong and Bomun dam watershed based on various rainfall data and increase inflow. Especially the Duckdong dam without flood control feature are widely exposed to the risk of flooding, thus it is constructed emergency gate at present. In this study reservoir routing program was simulation for basin runoff estimating using HEC-HMS model, the model simulation the reservoir condition of emergency Sate with and without. At the reservoir analysis results is the Duckdong dam average storage decrease $20\%$ with emergency gate than without emergency gate. Also, the Bomun dam is not affected by the Duckdong flood control augmentation.

Radiation Hardness Evaluation of GaN-based Transistors by Particle-beam Irradiation (방사선빔 조사를 이용한 질화갈륨 기반 트랜지스터의 내방사선 특성 연구)

  • Keum, Dongmin;Kim, Hyungtak
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.9
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    • pp.1351-1358
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    • 2017
  • In this work, we investigated radiation hardness of GaN-based transistors which are strong candidates for next-generation power electronics. Field effect transistors with three types of gate structures including metal Schottky gate, recessed gate, and p-AlGaN layer gate were fabricated on AlGaN/GaN heterostructure on Si substrate. The devices were irradiated with energetic protons and alpha-particles. The irradiated transistors exhibited the reduction of on-current and the shift of threshold voltage which were attributed to displacement damage by incident energetic particles at high fluence. However, FET operation was still maintained and leakage characteristics were not degraded, suggesting that GaN-based FETs possess high potential for radiation-hardened electronics.

Estimation in changes of Tidal Areas due to seawater circulation in Mangyung water area (만경수역의 해수유통으로 인한 조간대 면적변화 추정)

  • Cheon, Gi-Seol;Park, Yeong-Wook;Kwun, Soon-Kuk
    • Proceedings of the Korean Society of Agricultural Engineers Conference
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    • 2002.10a
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    • pp.133-136
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    • 2002
  • A simulation by the TOPAS model, two dimensional finite difference model was performed on the flows through drainage lock gate for the Saemangeum tidal reclamation project. Analysis focus on the changes of intertidal zone areas according to the operation scheme of the gate. The intertidal zone areas were analyzed as $66{\sim}70\;km^2$ when the opening of the gate was 300 m. It occupied about $85{\sim}90%$ of intertidal zone areas compared to that the Mangyung sea basin was opened without sea-dike. It appeared to be the most effective in terms of securing enough intertidal zone areas when the gate was operated as inflowing sea-water after 2 day's drainage.

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