• Journal of the Semiconductor & Display Technology
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• v.23 no.2
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• pp.87-91
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• 2024

SiO₂, renowned for its excellent insulating properties, has been used in the semiconductor industry as a valuable dielectric material. High-quality SiO₂ films find applications in gate spacers and interlayer insulation gap-fill oxides, among other uses. One of the prevalent methods for depositing these SiO₂ films is plasma enhanced chemical vapor deposition (PECVD) favored for its relatively low processing costs and ability to operate at low temperatures. However, compared to the increasingly utilized atomic layer deposition (ALD) method, PECVD exhibits inferior film characteristics such as uniformity. This study aims to produce SiO₂ films with uniformity as close as possible to those achieved by ALD through the adjustment of PECVD process parameters. we conducted a total of nine PECVD processes, varying the process time and gas flow rates, which were identified as the most influential factors on the PECVD process. Furthermore, ellipsometry analysis was employed to examine the uniformity variations of each process. The experimental results enabled us to elucidate the relationship between uniformity and deposition rate, as well as the impact of gas flow rate and deposition time on the process outcomes. Additionally, thickness measurements obtained through ellipsometer facilitate the identification of optimal process parameters for PECVD.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.3
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• pp.7-11
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• 2011

In this paper, we proposed a simple and high-yield printing process for source and drain electrodes of organic thin film transistor (OTFT). The surface energy of PVP (poly 4-vinylphenol) gate dielectric was decreased from 56 $mJ/m^2$ to 45 $mJ/m^2$ by adding fluoride of 3000ppm into it. Meanwhile the surface energy of source and drain (S/D) electrodes area on the PVP was increased to 87 $mJ/m^2$ by treating the areas, which was patterned by photolithography, with oxygen plasma, maximizing the surface energy difference from the other areas. A conductive polymer, G-PEDOT:PSS, was deposited on the S/D electrode areas by brushing painting process. With such a simple process we could obtain a high yield of above 90 % in $16{\times}16$ arrays of OTFTs. The performance of OTFTs with the fluoride-added PVP was similar to that of OTFTs with the ordinary PVP without fluoride, generating the mobility of 0.1 $cm^2/V.sec$, which was sufficient enough to drive electrophoretic display (EPD) sheet. The EPD panel employing the OTFT-backpane successfully demonstrated to display some patterns on it.

• Journal of the Korean Vacuum Society
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• v.9 no.3
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• pp.258-262
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• 2000

$YMnO_3$thin films are deposited on Si(100) and $Y_2O_3/Si(100)$ substrate by radio frequency sputtering. The deposition condition of oxygen partial pressure and annealing temperature have significant influences on the preferred orientation of $YMnO_3$film and the size of memory window. The results of x-ray diffraction show that the film deposited in the oxygen partial pressure of 0% is highly oriented along c-axis after annealing at $870^{\circ}C$ for 1 hr in oxygen ambient. However, the films deposited on Si and $Y_2O_3/Si$ in the oxygen partial pressures of 20% show $Y_2O_3$ peak, the excess $Y_2O_3$ in the $YMnO_3$film suppresses the c-axis oriented crystallization. Especially memory windows of the $Pt/YMnO_3/Y_2O_3/Si$ capacitor are 0.67~3.65 V at applied voltage of 2~12 V, which is 3 times higher than that of the film deposited on $Y_2O_3/Si$ in 20% oxygen (0.19~1.21 V) at the same gate voltage because the film deposited in 0% oxygen is well crystallized along c-axis.

• Applied Science and Convergence Technology
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• v.24 no.3
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• pp.53-59
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• 2015

The field-effect transistors (FETs) with a graphene-based p-n junction channel were fabricated using the patterned self-assembled monolayers (SAMs). The self-assembled 3-aminopropyltriethoxysilane (APTES) monolayer deposited on $SiO_2$/Si substrate was patterned by hydrogen plasma using selective coating poly-methylmethacrylate (PMMA) as mask. The APTES-SAMS on the $SiO_2$ surface were patterned using selective coating of PMMA. The APTES-SAMs of the region uncovered with PMMA was removed by hydrogen plasma. The graphene synthesized by thermal chemical vapor deposition was transferred onto the patterned APTES-SAM/$SiO_2$ substrate. Both p-type and n-type graphene on the patterned SAM/$SiO_2$ substrate were fabricated. The graphene-based p-n junction was studied using Raman spectroscopy and X-ray photoelectron spectroscopy. To implement low voltage operation device, via ionic liquid ($BmimPF_6$) gate dielectric material, graphene-based p-n junction field effect transistors was fabricated, showing two significant separated Dirac points as a signature for formation of a p-n junction in the graphene channel.

• Applied Chemistry for Engineering
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• v.23 no.6
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• pp.515-520
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• 2012

In this review, the fabrication of silicon based memory capacitor and organic memory thin film transistors (TFTs) was discussed for their potential identification tag applications and biosensor applications. Metal or non-metal nanoparticles (NPs) could be capped with chemicals or biomolecules such as protein and oligo-DNA, and also be self-assembly monolayered on corresponding target biomolecules conjugated dielectric layers. The monolayered NPs were formed to be charging elements of a nano floating gate layer as forming organic memody deivces. In particular, the strong and selective binding events of the NPs through biomolecular interactions exhibited effective electrostatic phenomena in memory capacitors and TFTs formats. In addition, memory devices fabricated as organic thin film transistors (OTFTs) have been intensively introduced to facilitate organic electronics era on flexible substrates. The memory OTFTs could be applicable eventually to the development of new conceptual devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.145-145
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• 2008

High-k materials have been paid much more attention for their characteristics with high permittivity to reduce the leakage current through the scaled gate oxide. Among the high-k materials, $ZrO_2$ is one of the most attractive ones combing such favorable properties as a high dielectric constant (k= 20 ~ 25), wide band gap (5 ~ 7 eV) as well as a close thermal expansion coefficient with Si that results in good thermal stability of the $ZrO_2$/Si structure. During the etching process, plasma etching has been widely used to define fine-line patterns, selectively remove materials over topography, planarize surfaces, and trip photoresist. About the high-k materials etching, the relation between the etch characteristics of high-k dielectric materials and plasma properties is required to be studied more to match standard processing procedure with low damaged removal process. Among several etching techniques, we chose the inductively coupled plasma (ICP) for high-density plasma, easy control of ion energy and flux, low ownership and simple structure. And the $BCl_3$ was included in the gas due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. During the etching process, the wafer surface temperature is an important parameter, until now, there is less study on temperature parameter. In this study, the etch mechanism of $ZrO_2$ thin film was investigated in function of $Cl_2$ addition to $BCl_3$/Ar gas mixture ratio, RF power and DC-bias power based on substrate temperature increased from $10^{\circ}C$ to $80^{\circ}C$. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by scanning emission spectroscope (SEM). The chemical state of film was investigated using energy dispersive X-ray (EDX).

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.176-176
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• 2010

One of the critical issues for applications of flexible organic thin film transistors (OTFTs) for flexible electronic systems is the electrical stabilities of the OTFT devices, including variation of the current on/off ratio (Ion/Ioff), leakage current, threshold voltage, and hysteresis under repetitive mechanical deformation. In particular, repetitive mechanical deformation accelerates the degradation of device performance at the ambient environment. In this work, electrical stability of the pentacene organic thin film transistors (OTFTs) employing multi-stack hybrid encapsulation layers was investigated under mechanical cyclic bending. Flexible bottom-gated pentacene-based OTFTs fabricated on flexible polyimide substrate with poly-4-vinyl phenol (PVP) dielectric as a gate dielectric were encapsulated by the plasma-deposited organic layer and atomic-layer-deposited inorganic layer. For cyclic bending experiment of flexible OTFTs, the devices were cyclically bent up to 105 times with 5mm bending radius. In the most of the devices after 105 times of bending cycles, the off-current of the OTFT with no encapsulation layers was quickly increased due to increases in the conductivity of the pentacene caused by doping effects from $O_2$ and $H_2O$ in the atmosphere, which leads to decrease in the Ion/Ioff and increase in the hysteresis. With encapsulation layers, however, the electrical stabilities of the OTFTs were improved significantly. In particular, the OTFTs with multi-stack hybrid encapsulation layer showed the best electrical stabilities up to the bending cycles of $10^5$ times compared to the devices with single organic encapsulation layer. Changes in electrical properties of cyclically bent OTFTs with encapsulation layers will be discussed in detail.

• Journal of Sensor Science and Technology
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• v.1 no.2
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• pp.173-181
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• 1992

Tantalum pentoxide($Ta_{2}O_{5}$) thin films on p-type (100) silicon wafer were fabricated by RF reactive sputtering. Physical properties and structure of the specimens were examined by XRD and AES. From the C-V analysis, the dielectric constant of $Ta_{2}O_{5}$ films was in the range of 10-12 in the reactive gas atmosphere in which 10% of oxygen gas is mixed. The ratio of Ta : 0 was 1 : 2 and 1 : 2.49 by AES and RBS examination, respectively. The heat-treatment at $700^{\circ}C$ in $O_{2}$ ambient led to induce crystallization. When the heat-treatment temperature was $1000^{\circ}C$, the dielectric constant was 20.5 in $O_{2}$ ambient and 23 in $N_{2}$ ambient, respectively. The crystal structure of $Ta_{2}O_{5}$ film was pseudo hexagonal of ${\delta}-Ta_{2}O_{5}$. The flat band voltage shift(${\Delta}V_{FB}$) of the specimens and the leakage current density were decreased for higher oxygen mixing ratio. The maximum breakdown field was 2.4MV/cm at the oxygen mixing ratio of 10%. The $Ta_{2}O_{5}$ films will be applicable to hydrogen ion sensitive film and gate oxide material for memory device.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.6
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• pp.1-6
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• 2011

A transparent oxide thin film transistors (Transparent Oxide-TFT) have been fabricated by RF magnetron sputtering at room temperature using amorphous indium zinc oxide (a-IZO) as both of active channel and source/drain, gate electrodes and co-sputtered $HfO_2-Al_2O_3$ (HfAIO) as gate dielectric. In spite of its high dielectric constant > 20), $HfO_2$ has some drawbacks including high leakage current and rough surface morphologies originated from small energy band gap (5.31eV) and microcrystalline structure. In this work, the incorporation of $Al_2O_3$ into $HfO_2$ was obtained by co-sputtering of $HfO_2$ and $Al_2O_3$ without any intentional substrate heating and its structural and electrical properties were investigated by x-ray diffraction (XRD), atomic force microscopy (AFM) and spectroscopic ellipsometer (SE) analyses. The XRD studies confirmed that the microcrystalline structures of $HfO_2$ were transformed to amorphous structures of HfAIO. By AFM analysis, HfAIO films (0.490nm) were considerably smoother than $HfO_2$ films (2.979nm) due to their amorphous structure. The energy band gap ($E_g$) deduced by spectroscopic ellipsometer was increased from 5.17eV ($HfO_2$) to 5.42eV (HfAIO). The electrical performances of TFTs which are made of well-controlled active/electrode IZO materials and co-sputtered HfAIO dielectric material, exhibited a field effect mobility of more than $10cm^2/V{\cdot}s$, a threshold voltage of ~2 V, an $I_{on/off}$ ratio of > $10^5$, and a max on-current of > 2 mA.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.2
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• pp.93-98
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• 2001

YMnO$_3$ films are excellent gate dielectric materials of ferroelectric random access memories (FRAMs) with MFSFET (metal -ferroelectric-semiconductor field effect transistor) structure because YMnO$_3$ films can be deposited directly on Si substrate and have a relatively low permittivity. Although the patterning of YMnO$_3$ thin films is the requisite for the fabrication of FRAMs, the etch mechanism of YMnO$_3$ thin films has not been reported. In this study, YMnO$_3$thin films were etched with Cl$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$ film is 285$\AA$/min under Cl$_2$/(Cl$_2$+Ar) of 1.0, RF power of 600 W, dc-bias voltage of -200V, chamber pressure of 15 mTorr and substrate temperature of $25^{\circ}C$. The selectivities of YMnO$_3$ over CeO$_2$ and $Y_2$O$_3$ are 2.85, 1.72, respectively. The selectivities of YMnO$_3$ over PR and Pt are quite low. Chemical reaction in surface of the etched YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS) surface of the selected YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy(XPS) and secondary ion mass spectrometry (SIMS). The etch profile was also investigated by scaning electron microscopy(SEM)