• 제목/요약/키워드: Gain matching

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A Capacitor Mismatch Error Cancelation Technique for High-Speed High-Resolution Pipeline ADC

  • Park, Cheonwi;Lee, Byung-Geun
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.4
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    • pp.161-166
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    • 2014
  • An accurate gain-of-two amplifier, which successfully reduces the capacitor mismatch error is proposed. This amplifier has similar circuit complexity and linearity improvement to the capacitor error-averaging technique, but operates with two clock phases just like the conventional pipeline stage. This makes it suitable for high-speed, high-resolution analog-to-digital converters (ADCs). Two ADC architectures employing the proposed accurate gain-of-two amplifier are also presented. The simulation results show that the proposed ADCs can achieve 15-bit linearity with 8-bit capacitor matching.

Analog CMOS Performance Degradation due to Edge Direct Tunneling (EDT) Current in sub-l00nm Technology

  • Navakanta Bhat;Thakur, Chandrabhan-Singh
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.3
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    • pp.139-144
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    • 2003
  • We report the results of extensive mixed mode simulations and theoretical analysis to quantify the contribution of the edge direct tunneling (EDT) current on the total gate leakage current of 80nm NMOSFET with SiO2 gate dielectric. It is shown that EDT has a profound impact on basic analog circuit building blocks such as sample-hold (S/H) circuit and the current mirror circuit. A transistor design methodology with zero gate-source/drain overlap is proposed to mitigate the EDT effect. This results in lower voltage droop in S/H application and better current matching in current mirror application. It is demonstrated that decreasing the overlap length also improves the basic analog circuit performance metrics of the transistor. The transistor with zero gate-source/drain overlap, results in better transconductance, input resistance, output resistance, intrinsic gain and unity gain transition frequency.

The Design of 50MHz-3GHz Wide-band Amplifier IC Using SiGe HBT (SiGe HBT를 이용한 50MHz-3GHz 대역폭의 광대역 증폭기 IC 설계)

  • 이호성;박수균;김병성
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2001.11a
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    • pp.257-261
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    • 2001
  • This paper presents the implementation of wide-band RFIC amplifier operating from near 50MHz to 3GHz using Tachyonics SiGe HBT foundry. Voltage shunt feedback is used for the flat gain and the broad band impedance matching. Initial design parameters are calculated using the low frequency small signal analysis. Since the HBT model was not available at the design time, discrete tuning board was made for fine tuning in the low frequency range. Fabricated amplifier shows 12dB gain with 1dB fluctuation and PldB reaches 15dBm at 850MHz.

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A Design of EMI / EMC Crossed Log-Periodic Dipole Antenna (EMI/EMC 측정용 십자형 대수 주기 다이폴 안테나의 설계 및 해석)

  • 김진태;최학근;진년강
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.5 no.3
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    • pp.48-58
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    • 1994
  • In this paper, a CLPDA (Crossed Log-Periodic Dipole Antenna) for EMI / EMC Measurement is presented, and is analyzed by Combining the moment method and the transmission line theory. The CLPDA has a broaddband characteristic. It is so important to achieve a impedance matching over op- erating frequency range that Twin-boom method is used at feed point. Here, the current distribution, input admittance, radiation pattern and gain are calculated. In practice CLPDA is fabricated. Calculated result for radiation pattern and gain are very closed to measured result.

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The Design on a Wideband Active Printed Dipole Antenna using a Balanced Amplifier

  • Lee, Sung-Ho;Kwon, Se-Woong;Lee, Byoung-Moo;Yoon, Young-Joong;Song, Woo-Young
    • Journal of electromagnetic engineering and science
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    • v.2 no.2
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    • pp.112-116
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    • 2002
  • In this paper, the active integrated antenna(AIA) using a wideband printed dipole antenna and a balanced amplifier is designed and fabricated. The proposed active printed dipole antenna has characteristics of easy matching, wide bandwidth and higher output power To feed balanced signal to printed dipole, a Wilkinson power divider and delay lines are used. The measured result shows that, at 6 GHz center frequency, the impedance bandwidth is 22 % (VSWR < 2), 3 dB gain bandwidth is 28 %, the maximum gain is 14.77 dBi, and output power at P1 dB point is 23 dBm.

Reactive Ion Etching Process Integration on Monocrystalline Silicon Solar Cell for Industrial Production

  • Yoo, Chang Youn;Meemongkolkiat, Vichai;Hong, Keunkee;Kim, Jisun;Lee, Eunjoo;Kim, Dong Seop
    • Current Photovoltaic Research
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    • v.5 no.4
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    • pp.105-108
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    • 2017
  • The reactive ion etching (RIE) technology which enables nano-texturatization of surface is applied on monocrystalline silicon solar cell. The additional RIE process on alkalized textured surface further improves the blue response and short circuit current. Such parameter is characterized by surface reflectance and quantum efficiency measurement. By varying the RIE process time and matching the subsequent processes, the absolute efficiency gain of 0.13% is achieved. However, the result indicates potential efficiency gain could be higher due to process integration. The critical etch process time is discussed which minimizes both front surface reflectance and etching damage, considering the challenges of required system throughput in industry.

Design of Triple-band Internal Antenna for the Mobile Phone (휴대폰 3중 대역 내장형 안테나 설계)

  • Oh, Kyu-Jong;Son, Tae-Ho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.11 no.4
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    • pp.171-174
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    • 2011
  • In this paper, transformed IFA design is proposed to improve the antenna gain of GSM/DCS/PCS band. New antenna structure has been approved to be more convenient matching in the mobile phone terminal and increase gains and expansion bandwidth through the simulation and real measurement. According to measurement, it's shown 1.57dB higher average gain than conventional IFA.

Linearization Method Using Variable Capacitance in Inter-Stage Matching Networks for CMOS Power Amplifier

  • Yoon, Jaehyuk;Park, Changkun
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.454-460
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    • 2019
  • In this paper, a watt-level 2.4-GHz RFCMOS linear power amplifier (PA) with pre-distortion method using variable capacitance with respect to input power is demonstrated. The proposed structure is composed of a power detector and a MOS capacitor to improve the linearity of the PA. The pre-distortion based linearizer is embedded in the two-stage PA to compensate for the gain compression in the amplifier stages, it also improves the output P1dB by approximately 1 dB. The simulation results demonstrate a 1-dB gain compression power of 30.81 dBm at 2.4-GHz, and PAE is 29.24 % at the output P1dB point.

Design and Fabrication of a MIC Gate Mixer Using GaAs MESFET (GaAs MESFET을 이용한 MIC 게이트 Mixer의 설계 및 제작)

  • Park, Han Kyu;Kim, Nam Su
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.6
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    • pp.868-873
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    • 1986
  • The Schottky barrier diode has been used as an element of the mixer inspite of its conversion loss. In this paper the use of a GaAs MESFET is shown as a device of mixer, and the conversion gain is obtained. Also, input matching circuits aredesigned by s-parameter and fabricated on a dielectric teflon epoxy fiber glass substrate. According to the results, the conversion gain is 9 dB at the signal frequency of 4 GHz and the intermediate frequency of 1.217GHz.

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A Transformer-Matched Millimeter-Wave CMOS Power Amplifier

  • Park, Seungwon;Jeon, Sanggeun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.5
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    • pp.687-694
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    • 2016
  • A differential power amplifier operating at millimeter-wave frequencies is demonstrated using a 65-nm CMOS technology. All of the input, output, and inter-stage network are implemented by transformers only, enabling impedance matching with low loss and a wide bandwidth. The millimeter-wave power amplifier exhibits measured small-signal gain exceeding 12.6 dB over a 3-dB bandwidth from 45 to 56 GHz. The output power and PAE are 13 dBm and 11.7%, respectively at 50 GHz.