• 제목/요약/키워드: Gain Margin

검색결과 176건 처리시간 0.028초

이득여유와 위상여유를 보강하는 견실한 PID 제어기 설계 (Robust PID controller design to ensure specified Gain and Phase Margin)

  • 조준호;류영국;최정내;황형수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 추계학술대회 논문집 학회본부 D
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    • pp.632-634
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    • 2000
  • The robust design of controllers to ensure gain and phase margin is can be use approximation of arctan function. In this paper, We proposed a tuning algorithm PID controllers based on specified gain and phase margin by a new approximation of arctan function. This method have linear interpolation equations of two arctan interval instead of one arctan interval of arctan(x). It is shown that the frequency response of this method was to ensure specified gain and phase margin.

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PSS 입력신호에 따른 이득여유 연구 (A Study of the Gain Margin in Accordance with the PSS Inputs)

  • 김동준;문영환;김태균;신정훈;김용학
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 C
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    • pp.1060-1062
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    • 1999
  • This paper proposes a guideline of choosing the optimum stabilizer input considering the gain margin of power system stabilizer between the optimum stabilizer gain and the allowable maximum stabilizer gain in accordance with the five inputs, such as generator shaft speed, bus frequency, electrical power, accelerating power and bus terminal voltage. The local mode damping and exciter mode damping are considered with increasing the stabilizer gain to determine each gain margin of the inputs.

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이득 여유가 작아도 안정한 개선된 네가티브 커패시턴스 회로 (Improved negative capacitance circuit stable with a low gain margin)

  • 김영필;황인덕
    • 전자공학회논문지SC
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    • 제40권6호
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    • pp.68-77
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    • 2003
  • 생체 임피던스 측정에 사용되는 프론트 엔드의 입력 커패시턴스를 상쇄시키며, 편하고, 작은 이득 여유로도 안정하게 동작하는 제안된 네가티브 커패시턴스 회로를 제안하였다. 기존의 회로를 사용하기 위해서는 적절한 이득-대역폭 적을 갖는 연산 증폭기를 선택해야 하는데 비하여 제안하는 회로는 광대역 연산 증폭기를 사용하므로 연산 증폭기의 선택이 쉽다. 또한 이득 여유가 귀환 커패시터에 직렬로 연결된 귀환 저항에 의하여 조절되므로 이득 여유를 가변 저항기로 튜닝할 수 있다. 제안된 회로의 입력 임피던스는 기존회로의 임피던스보다 2배 크며 네가티브 커패시턴스 회로를 채용하지 않았을 때에 비하여 40배 크다. 나아가서 제안된 회로의 폐루프 위상 응답은 기존의 회로와 네가티브 커패시턴스 회로를 채용하지 않았을 때에 비하여 좋다. 무엇보다도 이득 피킹이 발생하더라도 제안된 회로에서 이득 피킹의 주파수는 루프 이득이 최대로 되는 주파수 보다 높으므로, 이득 여유가 이득 피킹의 영향을 거의 받지 않는다. 따라서 제안된 회로는 매우 작은 이득 여유로도 안정하게 동작할 수 있다.

모델 불확실성을 고려한 변형된 IMC-PID 제어기 설계 (A Modified IMC-PID Controller Design Considering Model Uncertainty)

  • 김창현;임동균;서병설
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 심포지엄 논문집 정보 및 제어부문
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    • pp.128-130
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    • 2005
  • This paper proposes a modified IMC-PID controller that introduces controlling factor of the system identification to the standard IMC-PID controller in order to meet the design specifications such as gain, phase margin and maximum magnitude of sensitivity function in the frequency domain as well as the design specifications in time domain, settling, rising time and overshoot, and so on.

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Gain-phase margin specified PI speed control of a PM synchronous motor

  • Kim G.S.;Youn M.J.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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    • pp.994-997
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    • 2003
  • Simple tuning formulae are derived to design a Pl controller to meet the gain and phase margin specifications. These formulae are suitable for the auto-tuning of a process where the robustness should be guaranteed. The auto-tuned PI controller is examined for the speed regulation of a PM synchronous motor.

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High speed wide fan-in designs using clock controlled dual keeper domino logic circuits

  • Angeline, A. Anita;Bhaaskaran, V.S. Kanchana
    • ETRI Journal
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    • 제41권3호
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    • pp.383-395
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    • 2019
  • Clock Controlled Dual keeper Domino logic structures (CCDD_1 and CCDD_2) for achieving a high-speed performance with low power consumption and a good noise margin are proposed in this paper. The keeper control circuit comprises an additional PMOS keeper transistor controlled by the clock and foot node voltage. This control mechanism offers abrupt conditional control of the keeper circuit and reduces the contention current, leading to high-speed performance. The keeper transistor arrangement also reduces the loop gain associated with the feedback circuitry. Hence, the circuits offer less delay variability. The design and simulation of various wide fan-in designs using 180 nm CMOS technology validates the proposed CCDD_1 and CCDD_2 designs, offering an increased speed performance of 7.2% and 8.5%, respectively, over a conventional domino logic structure. The noise gain margin analysis proves good robustness of the CCDD structures when compared with a conventional domino logic circuit configuration. A Monte Carlo simulation for 2,000 runs under statistical process variations demonstrates that the proposed CCDD circuits offer a significantly reduced delay variability factor.

LQ 조절기의 안정도 영역에 관한 연구 : 시간 영역에서의 해석 (A Study on the Stability Magin of the LQ Regulator : Time Domain Analysis)

  • 김상우;권욱현;이상정
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1987년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 16-17 Oct. 1987
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    • pp.125-129
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    • 1987
  • The stability margin of the LQ regulator is investigated in the time domain. it is shown that the same guaranteed gain margin as that of the frequency domain analysis can be obtained with simple assumptions for the continuous time systems. It is also shown that the allowable modelling error bound can be expressed in terms of system matrices and Riccati equation solution. Guaranteed qain. margin and the allowable modelling error bound for the discrete time systems are also obtained by the similar procedures. In this case, through the some examples, the gain margin is shown to be less conservative than the frequency domain analysis result.

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The Optimal Compensator for AT Forward Multi Resonant Converter

  • Oh Yong-Seung;Kim Hee-Jun;Kim Chang-Sun
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.242-246
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    • 2001
  • The alternated forward multi resonant converter (AT forward MRC) is studied on the transient response and the measured loop gain for stability. The compensator is composed of the error amplifier with 3 poles and 2 zeros. This is optimized through the experiment with HP4194A network analyzer. We are initiated by the thinking of how to make the stabilization from the experimental results of loop gain curves. The loop gain, low frequency gain and gain margin are more improved through the experimental considerations. Also, the transient response is more enhanced effectively.

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출력에 시간지연이 있는 시스템을 위한 칼만필터의 주파수영역 특성 (Frequency-domain properties of Kalman filters for linear systems with delay in output)

  • 이상정
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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    • pp.169-171
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    • 1988
  • This paper deals with the robustness property of Kalman filters for linear systems with delay in output. The operator-type Riccati equation is transformed to algebraic equations, and the circle condition is derived. Based on the circle condition, it is shown that the same nondivergence margin, (1/2, .inf.) gain margin and +-60.deg. phase margin, is guaranteed as for ordinary systems.

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부성부하와의 발진을 고려한 단극발전기 시스템 설계 (A Design of Homopolar Generator System Considering Instability with Negative Characteristics Load)

  • 김인수;성세진
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2008년도 하계학술대회 논문집
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    • pp.449-451
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    • 2008
  • This paper studies the instability between homopolar generator and constant power load with negative impedance characteristics, provides the design method of homopolar generator system which overcomes the instability. In case of magnitude and phase of impedance of source and load mismatch, control instability of source can occur. For the safety of phase of load impedance, the gain of P, I controller with sufficient phase margin is applied through analysis on the simulation model of generator system, and the gain limit of load impedance is ensured by limitation of the gain margin of generator system. The stability of power system can be increased by considering and analyzing the impedance of source and load.

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