• Journal of electromagnetic engineering and science
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• v.7 no.4
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• pp.175-182
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• 2007

In this paper, a study on the reflector type frequency doubler, to suppress the undesired harmonics, is presented. A 12 to 24 GHz reflective frequency doubler is simulated and experimented. Design procedure of the frequency doubler with reflector is provided and the frequency doubler with good spectral purity is fabricated successfully. It has harmonic suppression of the $40{\sim}50\;dBc$ in the $1^{st}$ harmonic and the $50{\sim}60\;dB$ in the $3^{rd}$ harmonic with no additional filter. And, it has conversion gain with the input power of 0 dBm over bandwidth of 500 MHz. A NEC's ne71300(N) GaAs FET is used and the nonlinear model(EEFET3) using IC-CAP program is extracted for harmonic load pull simulation. Good agreement between simulated and measured results has been achieved.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.2
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• pp.147-154
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• 1990

A 4:1 Time Division Multiplexer(MUX) had been designed in using GaAs Source Coupled FET Logic(SCFL), Designed Multiplexer uses a time division frequency divider and two stage of singnal combining 2:1 multiplexer. The performance of the multiplexer is verified by PSPICE simulation. Designed circuit operates up to 12.5Gbit/s with a power dissipation of 192mW. These performance are more advanced than other reported multiplexer in the speed and power dissipation.

• Journal of Advanced Marine Engineering and Technology
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• v.37 no.1
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• pp.99-104
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• 2013

In this paper, we developed a fully integrated downconverter MMIC (monolithic microwave integrated circuit) including Lange coupler and output active balun for millimeter wave applications. Concretely, ${\lambda}$/4 transmission line was added to Lange coupler for size reduction of RF/LO input, and mixed RF/LO signals were applied to gate of the FET of mixer. Active balun was used at output port for a coupling of out-of-phase IF output signals. According to measured results, the proposed downconverter MMIC showed good RF performances. For example, the downconverter MMIC showed an LO leakage power of -25 dBc at IF output port, and a RF-LO isolation of 18 dB. Therefore, off-chip components such as LO rejection filters were not required for a normal operation of the proposed downconverter MMIC. The proposed downconverter MMIC showed a conversion gain of 10.3 dB at RF frequency of 63 GHz. The size of the downconverter MMIC including all active and passive components was $2.2{\times}1.4mm^2$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.987-994
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• 2010

In this paper, a simple and effective active load-pull method is proposed, and the method to improve the efficiency of X-band power amplifier using harmonic control circuit is presented. The proposed active load-pull system mainly consists of directional coupler, phase shifter, short circuit, and power amplifier, and allows a user to access reflection coefficients near the edge of the Smith chart($\Gamma$=1) easily. The device used in this paper is Mitsubishi's GaAs FET MGF1801, and the operating frequency of the power amplifier is 9 GHz, The amplifier had output power of 21.65 dBm and drain efficiency of 24.9 % at class-A, and had output power of 21.46 dBm and drain efficiency of 53.3 % at class-AB. Harmonic control circuit is designed only second and third harmonic components because of the bandwidth limitation of the microwave components. The drain efficiency is improved as much as 6.4 % compared with class-AB power amplifier.

• Journal of Navigation and Port Research
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• v.28 no.3
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• pp.213-219
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• 2004

In this paper, a LNA(Low Noise Amplifier) has been developed, which is operating at L-band i.e., 1452∼1492 MHz for satellite DAB(Digital Audio Brcadcasting) receiver. The LNA is designed to improve input and output reflection coefficient and VSWR(Voltage Standing Wave Ratio) by balanced amplifier. The LNA consists of low noise amplification stage and gain amplification stage, which make a using of GaAs FET ATF-10136 and VNA-25 respectively, and is fabricated by hybrid method. To supply most suitable voltage and current, active bias circuit is designed Active biasing offers the advantage that variations in $V_P$ and $I_{DSS}$ will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets $V_{gs}$ for the desired drain voltage and drain current. The LNA is fabricated on FR-4 substrate with RF circuit and bias circuit, and integrated in aluminum housing. As a reults, the characteristics of the LNA implemented more than 32 dB in gain. 0.2 dB in gain flatness. lower than 0.95 dB in noise figure, 1.28 and 1.43 each input and output VSWR, and -13 dBm in $P_{1dB}$.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.382-383
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• 2013

Gate-controlled spin-orbit interaction parameter is a key factor for developing spin-Field Effect Transistor (Spin-FET) in a quantum well structure because the strength of the spin-orbit interaction parameter decides the spin precession angle [1]. Many researches show the control of spin-orbit interaction parameter in n-type quantum channels, however, for the complementary logic device p-type quantum channel should be also necessary. We have calculated the spin-orbit interaction parameter and the effective mass using the Shubnikov-de Haas (SdH) oscillation measurement in a GaSb two-dimensional hole gas (2DHG) structure as shown in Fig 1. The inset illustrates the device geometry. The spin-orbit interaction parameter of $1.71{\times}10^{11}$ eVm and effective mass of 0.98 $m^0$ are obtained at T=1.8 K, respectively. Fig. 2 shows the gate dependence of the spin-orbit interaction parameter and the hole concentration at 1.8 K, which indicates the spin-orbit interaction parameter increases with the carrier concentration in p-type channel. On the order hand, opposite gate dependence was found in n-type channel [1,2]. Therefore, the combined device of p- and n-type channel spin transistor would be a good candidate for the complimentary logic device.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.99-107
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• 1996

When GPS (global positioning system) is used as synchronous signal in CDMA digital cellular base station system and high speed digital synchronous communication network, antenna cable length is increased, comparing with other GPS application such as positioning or car navigation. In this paper, it is proposed that a type of new GPS antenna system including RF stage for reduction of cable loss in case of long cable.The antenna system with TMPA(truncated-corners microstrip patch antenna) is designed and fabricated because GPS signal has RHCP (right-hand circular polarization), consequently antenna size can be made small size. LNA (low noise amplifier) is designed by using HEMT(high electron mobility transistor)which has lower noise figurae and better AGC characteristics at low voltage than GaAs FET, and we equiped mixer, in GPS antenna unit, which converts from 1575.42MHz to 75.42MHz. As result of comparing between typical system and proposed system when cable length is 60m, 63dB, 55dB and 25dB gain are obtained for RG-316/U, RG-58C/U and RG-213/U, and better characteristics are achieved than typical system as far as cable length is longer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.3
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• pp.201-206
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• 2019

This report constitutes the first demonstration in Korea of single-crystal lateral gallium oxide ($Ga_2O_3$) as a metal-oxide-semiconductor field-effect-transistor (MOSFET), with a breakdown voltage in excess of 480 V. A Si-doped channel layer was grown on a Fe-doped semi-insulating ${\beta}-Ga_2O_3$ (010) substrate by molecular beam epitaxy. The single-crystal substrate was grown by the edge-defined film-fed growth method and wafered to a size of $10{\times}15mm^2$. Although we fabricated several types of power devices using the same process, we only report the characterization of a finger-type MOSFET with a gate length ($L_g$) of $2{\mu}m$ and a gate-drain spacing ($L_{gd}$) of $5{\mu}m$. The MOSFET showed a favorable drain current modulation according to the gate voltage swing. A complete drain current pinch-off feature was also obtained for $V_{gs}<-6V$, and the three-terminal off-state breakdown voltage was over 482 V in a $L_{gd}=5{\mu}m$ device measured in Fluorinert ambient at $V_{gs}=-10V$. A low drain leakage current of 4.7 nA at the off-state led to a high on/off drain current ratio of approximately $5.3{\times}10^5$. These device characteristics indicate the promising potential of $Ga_2O_3$-based electrical devices for next-generation high-power device applications, such as electrical autonomous vehicles, railroads, photovoltaics, renewable energy, and industry.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.1 s.343
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• pp.143-148
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• 2006

This paper presents a high isolation and power-handling single-pole double-throw(SPDT) switch for dual band wireless LAN applications. The switch circuit has asymmetric topology which uses stacked-gate to have high power-handling and isolation for the Tx path. The proposed SPDT switch has been designed with optimum gate-width, bias, and number of stacked-gate FET. This SPDT switch has been implemented with $0.25{\mu}m$ GaAs pHEMT process which has Gmmax of 500mS/mm and fmax of 150GHz. The designed SPDT switch has the measured insertion loss of better than 0.9dB and isolation of better than 40dB for the Tx path and 25dB for the Rx path and the high power handling capability with PldB of about 23dBm for control voltage of -3/0V. The fabricated SPDT switch chip size is $1.8mm{\times}1.8mm$.

• Journal of Microbiology and Biotechnology
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• v.14 no.3
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• pp.470-473
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• 2004

In the yeast Saccharomyces cerevisiae, iron can be toxic. Because of this phenomenon, its metabolism of iron is strictly regulated. We have constructed a model system in which cell growth is defected during periods of iron over-load. When $Aft1-1^{up}$ protein was overexpressed with Ga110 promoter, a galactose inducible promoter, cell growth was defected and levels of CLN2 transcript decreased. However transcript levels of AFT1 and FET3 genes increased over time in a consistent manner throughout the course of $AFT1-1^{up}$ overexpression. We have screened to find genes to suppress cell growth defect by iron overload with YEp-derived high copy yeast genomic DNA library and found that high copy of Rmelp suppressed cell growth defects. Rme1p has been known as an activator protein of CLN2 gene expression. Taking these results together, we suggest that the yeast cell cycle is arrested at the $G_1$, phase by iron overload via Cln2p.