• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.3
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• pp.465-475
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• 2022

Due to the impact of COVID-19, people are paying attention to convenience and health, and the use of IoT devices to help them is increasing. In order to embed a lightweight security element in IoT devices that need to handle sensitive information even with limited resources, the development of a lightweight S-box is essential. Until 2021, it was common to develop a lightweight 4-bit S-box by a heuristic method, and to develop an extended structure or repeat the same operation for a larger size lightweight S-box. However, in January 2022, a paper that proposed a heuristic algorithm to find an 8-bit S-box with better differential uniformity and linearity than the S-box generated with an MISTY extended structure, although non-bijective, was published [1]. The heuristic algorithm proposed in this paper generates an S-box by adding AND operations one by one. Whenever an AND operation is added, they use a method that pre-removes the S-box for which the calculated differential uniformity does not reach the desired criterion. In this paper, we improve the performance of this heuristic algorithm. By increasing the amount of pre-removal using not only differential uniformity but also other differential property, and adding a process of calculating linearity for pre-removing, it is possible to satisfy not only differential security but also linear security.

• Journal of the Korean Society of Food Culture
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• v.3 no.2
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• pp.187-195
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• 1988

In accordance with the rapidly growing number of street food service without a registration, a study was undertaken to determine the present state of food service by the covered wagon bar, through an investigation in Jamwondong, around the south gate market and Kangnam subway station, in Seoul, between July 25th and August 25th of 1987. The survey was comprised of three parts: 1) foodservice operation in covered wagon, 2) personal and food handling hygiene, 3) food behaviors of customers. A total of 54 covered wagon bars, consisting of 51.8% mobile bars and 48.2% non-mobile bars, operating in the above three locations, were investigated. Survey results show non-mobile covered wagon bars to be more popular among persons in their thrities and fourties than among teens or the elderly; also among males than females; among company employees and college students than others. Seventy five percent of the mobile covered wagon bars served snack type foods and others served wine and foods for wine, in contrast to hundred percent of the non-mobile covered wagon bars served wine and foods for wine. The survey found many problems of hygiene, in method of food purchasing, menu planning, food preparation, dish washing treatment of leftovers and water supply, as well as personal hygiene. However, customers prefer the casual and popular atmosphere at the counter of the covered wagon bar. Finally, the study emphasizes a need for better operation of covered wagon bar, improvement of food stuff handling and the way of food services and personal hygiene. A change of the registration system from the illegal operation are urgently needed for better quality food services of covered wagon bars.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1055-1063
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• 2013

Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.6
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• pp.1083-1091
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• 2017

This paper describes a design of cryptographic processor supporting 224-bit elliptic curves over prime field defined by NIST. Scalar point multiplication that is a core arithmetic function in elliptic curve cryptography(ECC) was implemented by adopting the modified Montgomery ladder algorithm. In order to eliminate division operations that have high computational complexity, projective coordinate was used to implement point addition and point doubling operations, which uses addition, subtraction, multiplication and squaring operations over GF(p). The final result of the scalar point multiplication is converted to affine coordinate and the inverse operation is implemented using Fermat's little theorem. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 2.7-Kbit RAM and 27,739 gate equivalents (GEs), and the estimated maximum clock frequency is 71 MHz. One scalar point multiplication takes 1,326,985 clock cycles resulting in the computation time of 18.7 msec at the maximum clock frequency.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1296-1302
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• 2016

A hardware implementation of ultra-lightweight block cipher algorithm PRESENT that was specified as a block cipher standard for lightweight cryptography ISO/IEC 29192-2 is described in this paper. Two types of crypto-core that support master key size of 80-bit are designed, one is for encryption-only function, and the other is for encryption and decryption functions. The designed PR80 crypto-cores implement the basic cipher mode of operation ECB (electronic code book), and it can process consecutive blocks of plaintext/ciphertext without reloading master key. The PR80 crypto-cores were designed in soft IP with Verilog HDL, and they were verified using Virtex5 FPGA device. The synthesis results using $0.18{\mu}m$ CMOS cell library show that the encryption-only core has 2,990 GE and the encryption/decryption core has 3,687 GE, so they are very suitable for IoT security applications requiring small gate count. The estimated maximum clock frequency is 500 MHz for the encryption-only core and 444 MHz for the encryption/decryption core.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.2
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• pp.71-80
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• 1999

In this paper, a power MOSFET driver with protection circuits is designed using a 2${\mu}m$ high-voltage CMOS process. For stable operations of control circuits a power managing circuit is designed, and a voltage-detecting short-circuit protection(VDSCP) is proposed to protect a voltage regulator in the power control circuit. The proposed VDSCP scheme eliminates voltage drop caused by a series resistor, and turns off output current under short-circuit state. To protect a power MOSFET, a short-load protection, a gate-voltage limiter, and an over-voltage protection circuit are also designed A high voltage 2 ${\mu}m$ technology provides the breakdown voltage of 50 V. The driver consumes the power of 20 ~ 100 mW along its operation state excluding the power of the power MOSFET. The active area of the power MOSFET driver occupies $3.5 {\times}2..8mm^2$.

• Journal of Sensor Science and Technology
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• v.4 no.4
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• pp.29-40
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• 1995

In this paper, the noise equivalent cicuits that is necessary to the formulation of D.C. and noise characteristics, residual component and input capacitance so as to analyze on the noise factors of the SIT is proposed. The simplest noise equivalent circuit is the model representing the mechanism of the SIT and the measured values in this model were found as small as the values of the shot-noise. In the source resistance inserted equivalent circuit is conformed that the shot-noise will be reduced by the negative-feedback effect of the source resistance. In oder to analyze the correct noise reduction factor, I proposed the equivalent circuit which the formulas of the source and drain resistance was induced. In the experiment which affirm the equivalent circuits, the influence of the signal source resistance and output load resistance on the residual component is small and the residual component can be expressed by the equivalent input noise resistance. Moreover, the input capacitance is 13.6 pF when the load resistance is $0{\Omega}$ and the capacitance which does not concern with the SIT operation directly, that is, gate wire etc, is 10pF or so.

• Proceedings of the Korea Water Resources Association Conference
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• 2005.05b
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• pp.548-552
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• 2005

새만금호의 완공이후 내부 개발이 완료된 시점에서 만경강 및 동진강 홍수량 유입이 담수호의 수위 및 유속등 수리특성에 어떠한 변화를 가져올 것인가를 평가하기 위한 수치실험이 내부 관리수위(DL=-0.5m, DL=-1.0m, DL=-1.5m)별로 실시되었다. 홍수파의 전파에 따른 동적거동을 이상적으로 모의하기 위해서 본 연구에서는 2차원 수심적분의 모형인 ADCIRC 모형을 새만금 하구호에 적용하였다. 상류의 유입 경계조건으로는 50년 빈도의 홍수수문곡선도를 사용하여 만경강과 동진강의 유입량이 30분 간격으로 변화되는 홍수량을 이용하였다. 하류의 경계조건으로는 신시 수문이 외해의 조위와 내부 관리수위와 연동되어 외조위가 낮아질 때만 수문이 열리는 조건을 설정하는 동적인 경계조건이 설정되었다. 홍수 계산은 4일에 걸쳐 실시되어 새만금호 내부에서 수위와 유속의 변화를 관찰하였다. 만경수계내 홍수파의 동적 거동은 시간이 경과함에 따라 홍수파가 하류로 전파되어 수위와 유속 변화가 크게 나타난다. 만경강 유입부에서는 홍수수문곡선의 시간적 변화가 민감하게 작용하는 반면, 홍수파 전파가 하류로 진행하면서 유입부에서 높아졌던 수위가 새만금호 내부에서는 점차 낮아지면서 안정화 되는 것을 보여주고 있다. 그러나 수문이 위치한 지점에서는 유입 홍수에 의한 영향은 거의 나타나지 않고, 신시수문의 개방에 따라 동적으로 변동되는 것이 지배적이다. 유속 모의 결과 상류 수로부에서는 $1.8m/s\~0.5m/s$로 나타나지만 새만금호에 진입하면서 $0.5m/s\~0.2m/s$의 낮은 유속으로 변한다. 신시 갑문 인근에서는 수문을 닫을 때 일시적인 충격파가 내부로 전파되면서 와동현상을 보이는 등 유속과 수위 변화에 있어 동적으로 복잡한 거동을 보이는 것으로 해석 된다.한 영향을 미치는 인자에 대한 이론적인 분석을 수행하고, 배수갑문 개방에 의한 수질개선효과를 최대화하기 위한 환경관리 방안 제시에 중점을 두어 수행하였다.ncy), 환경성(environmental feasibility) 등을 정성적으로(qualitatively) 파악하여 실현가능한 대안을 선정하였다. 이렇게 선정된 대안들은 중유역별로 검토하여 효과가 있을 것으로 판단되는 대안들을 제시하는 예비타당성(Prefeasibility) 계획을 수립하였다. 이렇게 제시된 계획은 향후 과학적인 분석(세부평가방법)을 통해 대안을 평가하고 구체적인 타당성(feasibility) 계획을 수립하는데 토대가 될 것이다.{0.11R(mm)}(r^2=0.69)$로 나타났다. 이는 토양의 투수특성에 따라 강우량 증가에 비례하여 점증하는 침투수와 구분되는 현상이었다. 경사와 토양이 같은 조건에서 나지의 경우 역시 $Ro_{B10}(mm)=20.3e^{0.08R(mm)(r^2=0.84)$로 지수적으로 증가하는 경향을 나타내었다. 유거수량은 토성별로 양토를 1.0으로 기준할 때 사양토가 0.86으로 가장 작았고, 식양토 1.09, 식토 1.15로 평가되어 침투수에 비해 토성별 차이가 크게 나타났다. 이는 토성이 세립질일 수록 유거수의 저항이 작기 때문으로 생각된다. 경사에 따라서는 경사도가 증가할수록 증가하였으며 $10\% 경사일 때를 기준으로 $Ro(mm)=Ro_{10}{\times}0.797{\times}e^{-0.021s(\%)}$로 나타났다.천성 승모판 폐쇄 부전등을 초래하는 심각한 선천성 심질환이다. 그러나 진단 즉시 직접 좌관상동맥-대동맥 이식술로 수술적 교정을 해줌으로써 좋은 성적을 기대할 수 있음을 보여주었다.특히 교사들이 중요하게 인식

• Journal of Korea Water Resources Association
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• v.33 no.5
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• pp.551-559
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• 2000

In order to diagnose the water environment and assess the water quality restoration, long term trend of water environment has been surveyed at 3-R stations from 1994 to 1999 in Lake Shihwa. Annual mean values of $COD_{Mn}$, Chlorophyll a, total nitrogen, total phosphorus and Secchi depth are ranged in 5.2-15.1 mg/L, 7.3-14R.1 jlg/L, 1.50-4.84 mgN/L, 0.055-0.281 mgP/L and 0.5 -1.4 m, respectively, during the study periods. Carson's trophic state indeies were varied from mesotrophy in 1994 and 1995, hyper-eutrophy in 1996 and 1997, to meso eutrophy in 199R and 1999. After dike construction, water quality were rapidly deteriorated by allochthonous and autochthonous loading of high nutrients and organic carbon. Eutrophication phenomena were characterized by massive phytoplankton blooms and high concentration of COD. However, after onset of restoration program, lake water quality was rapidly restored to the level of just after sea-dike construction. The diversion of waste water inflowing from the Panwol and the Sihwa industrial districts which was started from March, 1997 has contributed to improve water quality in the surface layer. And the tidal mixing (sea water inflowing) through the continuous gate operation was the most effective measure to the whole lake restoration.ration.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.51-58
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• 2007

This paper presented an adaptive pipeline architecture for a high-performance and low-power asynchronous processor. The proposed pipeline architecture employed a stage-skipping and a stage-combining scheme. The stage-skipping scheme can skip the operation of a bubble stage that is not used pipeline stage in an instruction execution. In the stage-combining scheme, two consecutive stages can be joined to form one stage if the latter stage is empty. The proposed pipeline architecture could reduce the processing time and power consumption. The proposed architecture supports multi-processing in the EX stage that executes parallel 4 instructions. We designed an asynchronous microprocessor to estimate the efficiency of the proposed pipeline architecture that was synthesized to a gate level design using a $0.35-{\mu}m$ CMOS standard cell library. We evaluated the performance of the target processor using SPEC2000 benchmark programs. The proposed architecture showed about 2.3 times higher speed than the asynchronous counterpart, AMULET3i. As a result, the proposed pipeline schemes and architecture can be used for asynchronous high-speed processor design