• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.329-332
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• 2000

This paper proposed resource allocation algorithm for the minimum power consumption of functional unit in high level synthesis process as like DSP which is circuit to give many functional unit. In this paper, the proposed method though high level simulation find switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To used the switching activity find the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.121-124
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• 2001

This paper proposed resource allocation algorithm for the minimum switching activity of functional unit in high level synthesis process as like DSP which is circuit to give many functional unit. The resource allocation method after scheduling use the power function calculating average hamming distance and switching activity of the between two input. First of all, the switching activity is calculated by the input value after calculating the average hamming distance between operation. In this paper, the proposed method though high If level simulation find switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To use the switching activity find the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step. As the existing method, the execution time can be fast according to use the number of operator and max control step. And it is the reduction effect from 6% to 8%.

• 한국정보처리학회논문지
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• 제7권4호
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• pp.1255-1262
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• 2000

This paper proposes a hardware allocation and binding algorithm for ASIC Design. The proposed algorithm works on schedules input graph and simultaneously allocates and binds functional units, interconnections and registers by considering interdependency between operations and storage elements in each control step, in order to share registers and interconnections connected to functional units, as much as possible. Especially, he register allocation is executes the allocation optimal using graph coloring. This paper shows the effectiveness of the algorithm by comparing experiments to determine number of functional unit and register in advance or to separate executing allocation and binding of existing system.

• 한국군사과학기술학회지
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• 제2권2호
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• pp.52-60
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• 1999

By implementing the Systems Engineering process for the aircraft preliminary design, functional analysis study is performed, hence Functional Interface Data Flow(FIDF) and Functional Flow Block Diagram(FFBD) are generated. Based on FIDF and FFBD, allocable and non-allocable design/performance/RM＆S requirements are allocated to the appropriate levels. Weight and cost tracking and design margin management methodologies are studied and implemented for the balanced aircraft design.

• The Korean Journal of Ecology
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• 제18권2호
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• pp.231-241
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• 1995

I examined the relationship between allocations to plant size components such as plant height, total leaf weight, and nuber of branches and to reproductive components such as the number and weight of male and female fowers in three populations of the monoecious, wind-pollinated Ambrosia artemisiifolia. In particular, the two types of gender of plants, phenotypic and functional gender, were related to resource allocation. Mean values of all plant size and reproductive components differed significantly among the three populations. Such inter-population differences did not exist for both photosynthetic and reproductive efforts, Plant size components were mostly positively correlated with reproductive components among plants. However, the relationships between photosynthetic effort and reproductive components were largely negative and inconsistent among populations. The phenotypic gender was much lover than 0.5 in all of the three populations. Pairwise correlations between functional gender and each allocation measurement such as plant size components, reproductive components, photosynthetic effort, and reproductive effort were not consistent across the three populations. These results suggest that the gender of A. artemisiifolia measured as flower production responds sensitively to environmental conditions which might differ whithin as well as among populations.

• 한국ITS학회 논문지
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• 제6권3호
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• pp.165-173
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• 2007

본 논문에서는 최적의 설계 자동화를 위한 최소자원 할당 알고리듬을 제안한다. 제안된 할당 알고리듬은 연산자 간을 연결하는 신호선이 반복적으로 이용되어 연결 신호선 수가 최소가 될 수 있도록 기능 연산자를 할당한다. 레지스터 할당 시 연결구조에 따라 가중치를 갖는 구간 그래프를 구성한다. 최소의 클러스터 파티션 알고리듬을 이용하여 생성된 최대 크기의 클러스터들에 연결구조가 고려된 레지스터들을 할당한다. 또한 연결구조에 대한 멀티플렉서의 중복 입력을 제거하고 연산자에 연결된 멀티플렉서 간의 입력을 교환하는 입력 정렬 과정으로 연결 구조를 최소화한다. 또한, 벤치마크 실험을 통하여 제안된 알고리즘의 효용성을 보인다.

• 한국ITS학회 논문지
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• 제9권3호
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• pp.85-93
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• 2010

본 논문에서는 SOC 설계 자동화를 위한 할당 및 바인딩을 동시에 수행하는 새로운 동적인 하드웨어 할당 및 바인딩 알고리즘을 제안한다. 제안된 알고리즘은 스케줄링의 결과를 입력으로 받아들이고, 각 기능 연산자에 연결된 레지스터 및 연결 구조가 최대한 공유하도록 제어스텝마다 연산과 기억 소자의 상호 연결 관계를 고려하여 기능 연산자, 연결 구조 및 레지스터를 동시에 할당 및 바인딩을 한다. 제안된 알고리즘은 각 시스템마다 비교 실험을 통하여 기존의 기능 연산자와 레지스터의 수를 미리 정했거나, 분리하여 수행한 방식들과 비교함으로서 제안된 알고리즘의 효용성을 보인다.

• 한국통신학회논문지
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• 제25권10A호
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• pp.1604-1612
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• 2000

본 논문에서는 VLSI설계를 위한 동시수행 하드웨어 할당 및 바인딩 알고리듬을 제안한다. 제안된 알고리듬은 스케쥴링 결과를 입력으로 받아들이고, 각 기능 연산자에 연결된 레지스터 및 연결 구조가 최대한 공유하도록 제어스텝마다 연산과 기억 소자의 상호연결 관계를 고려하여 기능 연산자, 연결 구조 및 레지스터를 동시에 할당 및 바인딩을 한다. 또한 레지스터 할당은 그래프 컬러링을 이용하여 최적의 레지스터 할당을 수행한다. 제안된 알고리듬은 실험 결과를 통해 기존의 기능 연산자와 레지스터의 수를 미리 정했거나, 분리하여 수행한 방식들과 비교함으로서 본 논문의 효율성을 보인다.

• 대한전자공학회논문지
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• 제27권8호
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• pp.1303-1310
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• 1990

This paper describes the design and implementation of a system for automatic data path synthesis in digital system. There are four subtasks to synthesize a digital system: scheduling, register allocation, functional unit allocation and bus allocation. In this paper, force directed algorithm is used for the scheduling while new algorithms are proposed for the allocation subtasks. Synthesis results of two experimental data paths including MC6502 have shown that our proposed algorithm out goes most of previous works.

• 한국컴퓨터정보학회논문지
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• 제24권7호
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• pp.19-29
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• 2019

Requirements traceability is regarded as one of the important quality attributes in software requirements engineering field. If requirements traceability is guaranteed then we can trace the requirements' life throughout all the phases, from the customers' needs in the early stage of the project to requirements specification, deployment, and maintenance phase. This includes not only tracking the development artifacts that accompany the requirements, but also tracking backwards from the development artifacts to the initial customer requirements associated with them. In this paper, especially, we dealt with the traceability between functional requirements and non-functional requirements. Among many Information Retrieval (IR) techniques, we decided to utilize Latent Semantic Indexing (LSI) and Latent Dirichlet Allocation (LDA) in our research. Ultimately, we conducted an experiment on constructing traceability by using two techniques and analyzed the experiment results. And then we provided a comparative study between two IR techniques in constructing traceability between functional requirements and non-functional requirements.