• 제목/요약/키워드: Functional Testing

검색결과 463건 처리시간 0.019초

한국형 소아 기능근력검사의 개발을 위한 내용타당도 검증 (Content Validity for a New Korean Version of Pediatric Functional Muscle Testing)

  • 서혜정;김중휘
    • 대한물리의학회지
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    • 제11권2호
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    • pp.103-114
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    • 2016
  • PURPOSE: The purpose of this study was first to develop a Korean version of pediatric functional muscle testing for children with a motor developmental disorder who have a communication problem and who are aged below five years, and also to verify the content validity. METHODS: First, the preliminary study was conducted to verify the reliability of pediatric functional muscle testing, developed by Venita in Korea. Based on the results of the study, the primary evaluation items were selected and modified. Second, the first test of content validity was conducted through a panel discussion, and a second investigation of content validity was carried out by utilizing the Item Content Validity Index (I-CVI). In this study, we selected only 0.78 or more items from I-CVI. RESULTS: Based on the results of the preliminary study, 19 primary evaluation items were selected. Based on the results of the first and second content validity tests, 15 tertiary evaluation items for the Korean version of pediatric functional muscle testing were determined. CONCLUSION: This study developed a new Korean version of pediatric functional muscle testing and suggested that it will be a useful tool to measure muscle strength for Korean children with a motor developmental disorder and a communication problem, aged below five years.

저항성 단락과 개방 결함을 갖는 메모리에 대한 동작분석과 효율적인 테스트 알고리즘에 관한 연구 (A study on behavioral analysis and efficient test algorithm for memory with resistive short and open defects)

  • 김대익;배성환;이상태;이창기;전병실
    • 전자공학회논문지B
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    • 제33B권7호
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    • pp.70-79
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    • 1996
  • To increase the functionality of the memories, previous studies have deifned faults models and proposed functional testing algorithms with low complexity. Although conventional testing depended strongly on functional (voltage) testing method, it couldn't detect short and open defects caused by gate oxide short and spot defect which can afect memory reliability. Therefore, IDDQ (quiescent power supply current) testing is required to detect defects and thus can obtain high reliability. In this paper, we consider resistive shorts on gate-source, gate-drain, and drain-source as well as opens in mOS FET and observe behavior of the memory by analyzing voltage at storge nodes of the memory and IDDQ resulting from PSPICE simulation. Finally, using this behavioral analysis, we propose a linear testing algorithm of complexity O(N) which can be applicable to both functional testing and IDDQ testing simultaneously to obtain high functionality and reliability.

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함수형 선형모형에서의 B-스플라인에 기초한 검정 (Classical testing based on B-splines in functional linear models)

  • 손지훈;이은령
    • 응용통계연구
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    • 제32권4호
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    • pp.607-618
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    • 2019
  • 현대 과학기술의 발전으로 인해 함수 형태의 자료(functional data)는 기상학, 생물의학과 다양한 분야에서 발생하고 있으며 이러한 자료를 분석하는 것은 새롭고 흥미로운 통계과제라 할 수 있다. 스칼라 반응변수를 가진 함수형 선형회귀 모형(functional linear regression models with scalar response)은 널리 사용되는 함수형 자료 분석기법 중의 하나라 할 수 있고 이 회귀 모형에서 함수형 자료 (설명변수) 가 스칼라 반응변수에 영향력을 미치는지 검정하는 것은 중요한 문제라 할 수 있다. 최근, Kong 등은 함수형 주성분분석(functional principle component analysis)에 의한 차원 축소, 즉, 함수형 주성분분석 결과 얻어지는 고유함수(eigenfunctions)를 활용한 검정방법을 제안했다. 하지만, 그 고유함수들은 검정문제에서 관심사인 함수형 설명변수와 스칼라 반응변수의 연관성이 아니라 함수형 설명변수의 변동만을 고려하기 때문에 회귀문제에 사용하기에 일반적으로 적합한 기저가 아니다. 게다가, 자료로부터 추정하여야 하기 때문에 이 불필요한 추정오차가 검정 절차 성능에 포함될 가능성이 있다. 이러한 단점을 피하기 위해 본 논문에서는 기존의 고유기저함수가 아닌 고정기저(fixed basis)인 B-스플라인(B-splines) 함수를 활용한 검정 방법을 제안한고 모의실험을 통해 검정방법이 잘 작동한다는 것을 보여준다. 또한, 제안한 검정 방법은 B-스플라인의 국소화 성질 때문에 때론 효율적이고 직관적인 결과를 제공하는데 이를 모의실험과 실증자료 분석을 통해 보여줄 것이다.

트랜잭션 처리 시스템을 위한 동시성 제어의 기능시험 기법 (Functional Testing Techniques for Concurrency Control in Transaction Processing Systems)

  • 홍석희
    • 한국정보통신학회논문지
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    • 제7권4호
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    • pp.805-811
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    • 2003
  • 정해진 시간 내에 사용자 요구 조건을 충족시키도록 복잡한 소프트웨어를 개발하는 경우 시스템 시험은 중요한 요인이다. 데이터베이스 관리 시스템의 모듈 중 트랜잭션 처리 시스템은 다중 사용자 환경에서 트랜잭션의 수행과 데이터 일관성을 유지하는 중요한 기능을 한다. 본 논문은 트랜잭션 처리 시스템의 동시성 제어 기능이 요구조건을 만족하는지를 체계적이고 자동적으로 시험하기 위한 기법을 제안한다. 다섯 가지 잠금 모드를 지원하는 2단계 잠금 기법을 적용하는 동시성 제어 모듈의 기능을 자동적으로 시나리오 기반의 기능시험을 하고 시험 결과를 사용자에게 제시한다. 또한, 본 논문에서 제안한 기능시험 기법을 실제 데이터베이스 관리 시스템의 모듈 시험 과정에 적용하여 그 타당성을 확인한다.

순차 회로의 지연 고장 검출을 위한 새로운 스캔 설계 (New Scan Design for Delay Fault Testing of Sequential Circuits)

  • 허경회;강용석;강성호
    • 대한전기학회논문지:전력기술부문A
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    • 제48권9호
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    • pp.1161-1166
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    • 1999
  • Delay testing has become highlighted in the field of digital circuits as the speed and the density of the circuits improve greatly. However, delay faults in sequential circuits cannot be detected easily due to the existence of state registers. To overcome this difficulty a new scan filp-flop is devised which can be used for both stuck-at testing and delay testing. In addition, the new scan flip-flop can be applied to both the existing functional justification method and the newly-developed reverse functional justification method which uses scan flip-flops as storing the second test patterns rather than the first test patterns. Experimental results on ISCAS 89 benchmark circuits show that the number of testable paths can be increased by about 10% on the average.

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범용 개발 보드를 이용한 차량용 소프트웨어 테스트 시스템 개발 (Testing System for Automotive Software Using a General Purpose Development Board)

  • 금대현;홍재승;진성호;조정훈
    • 대한임베디드공학회논문지
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    • 제7권1호
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    • pp.17-24
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    • 2012
  • Recently automotive software has been more complex and needs to be reduced its development time. Software testing of its functionalities and performance should be conducted in an early development phase to reduce time to market and the development cost. Software functional testing can be performed through simulating the hardware, but it is not guaranteed that evaluation of real-time performance using simulation has enough accuracy. Real-time performance can be precisely evaluated with hardware-in-the-loop simulation, but it costs time and effort to set up hardware for testing. In this paper, we suggest a testing system that can evaluate functional requirements and real time properties with a general-purpose development board in the early development phase. In addition, we improve reusability of the testing system through modularized and layered architecture. With the proposed testing system we can contribute to building reliable testing system at low cost without difficulty.

미세먼지 차단 기능성 의류 제품의 성능 평가에 관한 연구 (Performance Evaluation of Fine-Dust Blocking Effect of Functional Clothing)

  • 황석주;이창훈;권진경;김영실;최은진;김다진;김민;육세진
    • 한국입자에어로졸학회지
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    • 제18권4호
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    • pp.137-145
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    • 2022
  • As many studies on the harmfulness of fine dust have been reported, awareness of its seriousness is spreading. Recently, interest in indoor air quality as well as air pollution is increasing, and research on measures to block fine dust flowing into the room from the outside is being conducted. The clothing company is launching functional clothing to prevent fine dust attached to clothing from entering the room through outdoor activities. However, it is difficult to confirm whether there is actually fine-dust blocking performance, and there is no evaluation standard. In this study, the contamination rate caused by fine dust was quantitatively compared through image processing after contamination of the outer fabric for 4 types of commercially available functional clothing with fine-dust blocking effect. The difference in particle contamination according to the material of the outer fabric was analyzed by comparing the surface resistance, and it was found that the higher the surface resistance of the outer fabric material, the more fine dust was attached. The analysis method of this study is expected to be able to quantitatively compare and evaluate the fine-dust blocking performance of functional clothing.

철도신호 소프트웨어 테스팅을 위한 MSC 기반 테스트케이스 생성 모듈 (MSC-based Test-case Generation Module for Railway Signaling Software Testing)

  • 황종규;백종현
    • 전기학회논문지P
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    • 제64권3호
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    • pp.138-142
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    • 2015
  • Most of the existing studies on functional safety testing for the railway signaling system software have focused on verifying the functional safety through the monitoring of internal memory embedded railway signaling system. However, the railway signaling system is one of the typical embedded control system in the railway sector, and the embedded software has a characteristic of generating an appropriate outputs through the combination of internal processing in consideration of the current internal status and external input. Therefore, the test approach of using the interface communication channel can be effective way for the functional testing for railway signaling system software in consideration of these characteristic. Since a communication interface specification of the railway signal system has a the properties of the sequence input and output signals, test-case for software testing is the most effective methodology by MSC (Message Sequence Chart) language, one of the graphic language. The MSC-based test-case generating methodology for signaling system software was proposed in this paper.

기능 안전 관점에서의 의료기기 소프트웨어 신뢰성 평가 방법에 관한 연구 (Study on Reliability Assessment for the Medical Device Software from the Viewpoint of Functional Safety)

  • 김성민;고병각;도경훈;김혜진;함중걸
    • 한국신뢰성학회지:신뢰성응용연구
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    • 제16권3호
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    • pp.216-223
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    • 2016
  • Purpose: This paper suggests the procedure to enhance the reliability of the software of the medical device that is to cure, treat, diagnose, and prevent a disease or an abnormal health conditions. Methods: After test requirements are classified by the software requirements specification for safety and backgrounds, reliability assessment methods are suggested. Results: Verification and validation for function and safety can be performed whether the medical device software are implemented as intended. Conclusion: Procedure on the static analysis, unit test, integration test, and system test are provided for the medical device software.

초 고집적 메모리의 효율적인 테스트를 위한 BIST 회로와 BICS의 설계 (A design of BIST circuit and BICS for efficient ULSI memory testing)

  • 김대익;전병실
    • 전자공학회논문지C
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    • 제34C권8호
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    • pp.8-21
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    • 1997
  • In this paper, we consider resistive shorts on gate-source, gate-drain, and drain-source as well as opens in MOS FETs included in typical memory cell of VLSI SRAM and analyze behavior of memory by using PSPICE simulation. Using conventional fault models and this behavioral analysis, we propose linear testing algorithm of complexity O(N) which can be applied to both functional testing and IDDQ (quiescent power supply current) testing simultaneously to improve functionality and reliability of memory. Finally, we implement BIST (built-in self tsst) circuit and BICS(built-in current sensor), which are embedded on memory chip, to carry out functional testing efficiently and to detect various defects at high-speed respectively.

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