• Title/Summary/Keyword: Front-End

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CASA-based Front-end Using Two-channel Speech for the Performance Improvement of Speech Recognition in Noisy Environments (잡음환경에서의 음성인식 성능 향상을 위한 이중채널 음성의 CASA 기반 전처리 방법)

  • Park, Ji-Hun;Yoon, Jae-Sam;Kim, Hong-Kook
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.289-290
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    • 2007
  • In order to improve the performance of a speech recognition system in the presence of noise, we propose a noise robust front-end using two-channel speech signals by separating speech from noise based on the computational auditory scene analysis (CASA). The main cues for the separation are interaural time difference (ITD) and interaural level difference (ILD) between two-channel signal. As a result, we can extract 39 cepstral coefficients are extracted from separated speech components. It is shown from speech recognition experiments that proposed front-end has outperforms the ETSI front-end with single-channel speech.

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Axial Impact Collapse Analysis on Front-End Side Members of Vehicles by FEM (FEM에 의한 차량전면부 사이드부재의 축방향 충격압궤 해석)

  • Cha Cheon-Seok;Chung Jin-Oh;Yang In-Young
    • Journal of the Korean Society of Safety
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    • v.18 no.4
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    • pp.1-7
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    • 2003
  • The front-end side members of vehicles(spot welded hat and double hat shaped section members) absorb most of the impact energy in a case of front-end collision. In this paper, specimens with various spot weld pitches have been tested with a high impact velocity of 7.19m/sec(impact energy of 1034J). The axial impact collapse simulation on the sections has been carried out to review the collapse characteristics of these sections, using an explicit finite element code, LS-DYNA3D. Comparing the results with experiments, the simulation has been verified; the energy absorbing capacity is analyzed and an analysis method is suggested to obtain exact collapse loads and deformation collapse modes.

Phase-Shifted Full Bridge(PSFB) DC/DC Converter with a Hold-up Time Compensation Circuit for Information Technology (IT) Devices (홀드 업 타임 보상회로를 가진 IT 기기용 Front-end PSFB DC/DC 컨버터)

  • Yi, Kang-Hyun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.5
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    • pp.501-506
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    • 2013
  • A hold-up time compensation circuit is proposed to get high efficiency of the front-end phase-shifted full bridge DC/DC converter. The proposed circuit can make the phase-shifted full bridge front-end DC/DC converter built with 0.5 duty ratio so that the conduction loss of the primary side and voltage stress across rectifier in the secondary side are reduced and the higher efficiency can be obtained. Furthermore, the requirement of an output filter significantly can diminish due to the perfect filtered waveform. A 12V/100A prototype has been made and experimental results are given to verify the theoretic analysis and detailed features.

Comparison of Two Parallel Differential Power Processing Configurations (병렬 Differential Power Processing 컨버터의 비교 분석)

  • Lee, Hyunji;Kim, Katherine Ann
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.48-49
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    • 2017
  • 태양광 발전 시스템 구현에 있어 가장 큰 문제점 중 하나는 불균일한 태양빛 조건에서의 전체 시스템 발전량 감소이다. 이를 해결하기 위해 module-integrated converter (MIC), dc optimizer, differential power processing (DPP) 등 다양한 컨버터가 연구되고 있다. 그 중에서도 DPP 컨버터는 낮은 전력변환 손실로 높은 시스템 효율을 얻을 수 있어 최근 많은 주목을 받고 있다. 보통 그리드 연결형 태양광발전 시스템에 적용되는 직렬 DPP의 경우, 이미 많은 연구가 진행되고 있지만, 병렬 DPP의 경우 아직 많은 연구가 필요한 상황이다. 본 논문에서는 front-end 컨버터의 존재 유무에 따른 두 가지 병렬 DPP 컨버터 배열을 비교 분석 하였다. Front-end 컨버터가 적용된 병렬 DPP 컨버터 배열의 경우, dc 전압과 태양전지의 전압 차이를 최소화해 전력 변환 손실을 감소시킬 수 있지만, front-end 컨버터에서 추가적인 전력 변환 손실이 발생한다. Front-end 컨버터가 없는 경우, dc 전압과 태양전지의 전압차이가 커 DPP 컨버터에서 발생하는 전력 변환 손실이 커진다. 따라서 주어진 조건 아래 효율적인 병렬 DPP 컨버터 디자인을 위한 가이드라인을 본 논문에서 제시하고자 한다.

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DEVELOPMENT OF A FRONT END PLANNING TOOL FOR SUSTAINABILITY

  • Sang-Hoon Lee;Spencer Howard;Lingguang Song;Kyungrai Kim
    • International conference on construction engineering and project management
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    • 2009.05a
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    • pp.506-513
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    • 2009
  • The Construction Industry Institute (CII) developed the Project Definition Rating Index (PDRI), as a part of their Front End Planning best practices, which helps project managers assess and measure project scope definition risk elements. U.S. Green Building Council are seeing the benefits of sustainable building and Leadership in Energy and Environmental Design certification by positively impacting life cycle costs, building marketability, and organizational productivity. However, there have been no efforts to integrate these two planning tools in construction industry. By applying a supplemental tool which combines the PDRI with the LEED rating system, construction industry can develop and implement a tailored instrument that leads to total project success in sustainability. The objective of this research is to assemble a new front end planning mechanism for green buildings by incorporating the current PDRI and LEED systems.

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Global Collaboration During Front End Planning of Capital Projects

  • Gibson, G. Edward Jr.
    • International conference on construction engineering and project management
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    • 2015.10a
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    • pp.15-18
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    • 2015
  • Front end planning is arguably the most impactful process in the successful delivery of capital projects. Organizations expend substantial effort in this planning process, intending to minimize risk and promote project success. This process has been well documented, including critical technical components, as well as the importance of team collaborative components. As organizations continue to pursue large projects with multi-national participation from sponsors, designers, contractors and suppliers, the importance of collaboration on a global scale during front end planning becomes more important, not less. This paper will outline research performed over the past two decades giving the basic components of the process and the value of global collaboration. It will provide guidance to project participants in pursuing successful planning.

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A 0.13 ㎛ CMOS Dual Mode RF Front-end for Active and Passive Antenna (능·수동 듀얼(Dual) 모드 GPS 안테나를 위한 0.13㎛ CMOS 고주파 프론트-엔드(RF Front-end))

  • Jung, Cheun-Sik;Lee, Seung-Min;Kim, Young-Jin
    • Journal of Advanced Navigation Technology
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    • v.13 no.1
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    • pp.48-53
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    • 2009
  • The CMOS RF front-end for Global Positioning System(GPS)are implemented in 1P8M CMOS $0.13{\mu}m$ process. The LNAs consist of LNA1 with high gain and low NF, and LNA2 with low gain and high IIP3 for supporting operation with active and passive antenna. the measured performances of both LNAs are 16.4/13.8 dB gain, 1.4/1.68 dB NF, and -8/-4.4 dBm IIP3 with 3.2/2 mA form 1.2 V supply, respectively. The quadrature downconversion mixer is followed by transimpedance amplifier with gain controllability from 27.5 to 41 dB. The front-end performances in LNA1 mode are 39.8 dB conversion gain, 2.2 dB NF, and -33.4 dBm IIP3 with 6.6 mW power consumption.

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A Bluetooth/WiFi Dual-Mode RF Front-End Module Using LTCC Technology (LTCC 기술을 이용한 Bluetooth/WiFi 이중 모드 무선 전단부 모듈 구현)

  • Ham, Beom-Cheol;Ryu, Jong-In;Kim, Jun-Chul;Kim, Dong-Su;Park, Young-Cheol
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.8
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    • pp.958-966
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    • 2012
  • This paper presents a compact bluetooth/WiFi dual-mode dual-band RF front-end module(FEM) is realized by low temperature co-fired ceramic(LTCC) technology. The proposed RF front-end module consists of a diplexer, baluns in the LTCC substrate, and an SPDT switch, an SP3T switch on the LTCC substrate. In order to reduce the module size and increase integration level, the proposed diplexer and balun are designed using LC lumped elements. The parasitic elements caused by coupling effect between metal pattern layers and ground plane layer are considered during the design. The fabricated dual-mode RF front-end module has 13 pattern layers including three inner ground layers and it occupies less than $3.0mm{\times}3.7mm{\times}0.66mm$.

A $0.13-{\mu}m$ CMOS RF Front-End Transmitter for LTE-Advanced Systems (LTE-Advanced 표준을 지원하는 $0.13-{\mu}m$ CMOS RF Front-End 송신기 설계)

  • Kim, Jong-Myeong;Lee, Kyoung-Wook;Park, Min-Kyung;Choi, Yun-Ho;Jung, Jae-Ho;Kim, Chang-Wan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.402-403
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    • 2011
  • This paper has proposed a $0.13-{\mu}m$ CMOS RF Front-end transmitter for LTE-Advanced systems. The proposed RF Front-end supports a band 7 (from 2500 MHz to 2570 MHz) in E-UTRA of 3GPP. It can provide a maximum output power level of +10 dBm but it's a normal output power level is +0 dBm considering a low PAPR. The post-layout simulation results show that the quadrature up-conversion mixer and a driver amplifier consumes 14 mA and 28 mA from a 1.2 V supply voltage respectively, while providing a output power level of 0 dBm at the input power level of -13 dBm.

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