• Journal of information and communication convergence engineering
• /
• v.6 no.2
• /
• pp.177-181
• /
• 2008

The more improved the Internet and the information technology, the stronger cryptographic system is required which can satisfy the information security on the platform of personal hand-held devices or smart card system. This paper introduces a case study of designing an elliptic curve cryptographic processor of a high performance that can be suitably used in a wireless communicating device or in an embedded system. To design an efficient cryptographic system, we first analyzed the operation hierarchy of the elliptic curve cryptographic system and then implemented the system by adopting a serial cell multiplier and modified Euclid divider. Simulation result shows that the system was correctly designed and it can compute thousands of operations per a second. The operating frequency used in simulation is about 66MHz and gate counts are approximately 229,284.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.07a
• /
• pp.523-526
• /
• 2001

In this paper, we design and fabricate the high-efficiency and low-power switched-capacitor DC-DC converter. This converter consists of internal oscillator, output driver and output switches. The internal oscillator has 100kHz oscillation frequency and the output switches composed of one pMOS transistor and three nMOS transistors. According to the configuration of two external capacitors, the converter has three functions that are the Inverter, Doubler and Divider. The proposed converter is fabricated through the 0.8$\mu\textrm{m}$ 2-poly, 2-metal CMOS process. The simulation and experimental result for fabricated IC show that the proposed converter has the voltage conversion efficiency of 98% and power efficiency more than 95%.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.12 no.1
• /
• pp.10-17
• /
• 2012

This paper presents a clock regenerator using two $2^{nd}$ order ${\sum}-{\Delta}$ (sigma-delta) modulators for wide range of dividing ratio as defined in HDMI standard. The proposed circuit adopts a fractional-N frequency synthesis architecture for PLL-based clock regeneration. By converting the integer and decimal part of the N and CTS values in HDMI format and processing separately at two different ${\sum}-{\Delta}$ modulators, the proposed circuit covers a very wide range of the dividing ratio as HDMI standard. The circuit is fabricated using 0.18 ${\mu}m$ CMOS and shows 13 mW power consumption with an on-chip loop filter implementation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.12C
• /
• pp.268-272
• /
• 2001

In this thesis, PLVCO(Phase Locked Voltage Controlled Oscillator) using 24.42 GHz voltage controlled hair-pin resonator oscillator, Sequency divider, buffer amplifier, -10 dB directional coupler and phase detector is designed and fabricated for B-WLL. The PLVCO shows the oscillator output power of 16.5 dBm at 24.42 GHz, and phase noise of -76.3 dBc/Hz at 1001:Hz offset, -72.8dBc/Hz at 10 kHz offset from fundamental frequency.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.24 no.6
• /
• pp.998-1004
• /
• 1987

This paper describes the design theory of a weakly-coupled Tap-off with high density of coupling intervals for CATV ynd/or MyTV systyms, by yhich the degree of freedom in design and density of coupling intervals are significantly increased compared with the intrinsic one. It is also described how a 2-way power divider(Tap-off) is constructed in the generalized type. Furtuermore, the practical measurements of the frequency characteristics for a fabricated circuit show very good agreements with theoretical results, and, hence, the validity of the proposed design and analyses methods are confirmed.

• Proceedings of the KIEE Conference
• /
• 1996.07c
• /
• pp.1882-1884
• /
• 1996

This paper deals with the lightning surge counter. In order to install the effective surge protective devices, it is important to find the parameters of incident surges. For the purpose of observing the occurrence frequency as a parameter of the amplitude of surge, two type surge counters were designed and fabricated. One is operated by surge currents, and the other is operated by surge voltages. The former consists of current sensor, metal oxide varister (MOV), rectifier, capacitor and electromagnetic counter. The latter consists of rectifier, voltage divider, comparator, photo coupler and counter circuit, and is useful for detecting the surge voltages.

• Journal of electromagnetic engineering and science
• /
• v.2 no.2
• /
• pp.112-116
• /
• 2002

In this paper, the active integrated antenna(AIA) using a wideband printed dipole antenna and a balanced amplifier is designed and fabricated. The proposed active printed dipole antenna has characteristics of easy matching, wide bandwidth and higher output power To feed balanced signal to printed dipole, a Wilkinson power divider and delay lines are used. The measured result shows that, at 6 GHz center frequency, the impedance bandwidth is 22 % (VSWR < 2), 3 dB gain bandwidth is 28 %, the maximum gain is 14.77 dBi, and output power at P1 dB point is 23 dBm.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.15 no.2
• /
• pp.147-154
• /
• 1990

A 4:1 Time Division Multiplexer(MUX) had been designed in using GaAs Source Coupled FET Logic(SCFL), Designed Multiplexer uses a time division frequency divider and two stage of singnal combining 2:1 multiplexer. The performance of the multiplexer is verified by PSPICE simulation. Designed circuit operates up to 12.5Gbit/s with a power dissipation of 192mW. These performance are more advanced than other reported multiplexer in the speed and power dissipation.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.8 no.11
• /
• pp.1641-1646
• /
• 2013

Control voltage for baseband channel selection filter to select one of communication channels can be easily fluctuated according to external noise or variation of fabrication. In this paper, we design a voltage regulator with small chip area to keep control voltage constantly using current comparative method. Cut-off frequency of channel selection filter is automatically controlled by detecting current flow using the proposed voltage regulator.

• Proceedings of the KAIS Fall Conference
• /
• 2007.11a
• /
• pp.63-66
• /
• 2007

본 논문에서는 주변에서 쉽게 구할 수 있는 재료를 이용해 만든 인덕터와 커패시터를 사용해 윌킨슨 전력 분배기를 설계/제작하였다. 일반적으로 전력 분배기는 $\lambda/4$ 전송선로를 이용하기 때문에 인덕터와 커패시터를 사용할 수 있도록 전송선로를 집중소자로 변환해야 한다. 전송선로를 집중소자로 변환하기 위해 한 개의 직렬 인덕터와 두 개의 병렬 커패시터로 등가화하였다. 인덕터는 솔레노이드 형태로 선의 굵기와 솔레노이드의 반지름, 감은수에 변화를 주며 제작하였고, 커패시터는 평행판 커패시터 형태로 넓이에 변화를 주어 제작하였다. 구현된 전력 분배기는 설계 주파수에서 각각의 출력 포트에 -3.30dB, -3.31dB로 전력이 균등분배 되는 특성을 보였고, 반사손실은 -42.36dB, 출력 포트 간의 격리도는 -31.54dB로 설계 조건을 만족하였다.