• Title/Summary/Keyword: Forward-bias

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A Design of bias circuit in temperature independent voltage detect circuit (온도에 의존하지 않는 전압 감시회로에서의 바이어스 회로의 설계)

  • 문종규;백종무
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.9
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    • pp.49-56
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    • 1998
  • In this paper, a design of bias circuit in temperature independent voltage detect circuit is proposed. In order to realize this intention, we are used the differences in temperature coefficient of thermal voltage, resistor and transistor forward voltage(V$\sub$BE/) which is consisted in comparator. That is, It is realized by compensating the difference of temperature coefficient due to using components with each different temperature coefficient. As well, reference voltage of the circuit is accomplished by the difference of transistor forward voltage($\Delta$V$\sub$BE/) in comparator. In using reference voltage, resistor and V$\sub$BE/ Multiplier, we can design detect voltage of the circuit. In order to test operation of proposing circuit, we manufactured IC. Then, we measured operating characteristics and capability of the circuit by using HP4145B and temperature chamber. The result, we could obtain the good variation of temperature from -0.01 %/$^{\circ}C$ to -0.025 %/$^{\circ}C$.

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Effect of High Temperature Annealing on the Characteristics of SiC Schottky Diodes (고온 열처리 공정이 탄화규소 쇼트키 다이오드 특성에 미치는 영향)

  • Cheong, Hui-Jong;Bahng, Wook;Kang, In-Ho;Kim, Sang-Cheol;Han, Hyun-Sook;Kim, Hyeong-Woo;Kim, Nam-Kyun;Lee, Yong-Jae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.9
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    • pp.818-824
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    • 2006
  • The effects of high-temperature process required to fabricate the SiC devices on the surface morphology and the electrical characteristics were investigated for 4H-SiC Schottky diodes. The 4H-SiC diodes without a graphite cap layer as a protection layer showed catastrophic increase in an excess current at a forward bias and a leakage current at a reverse bias after high-temperature annealing process. Moreover it seemed to deviate from the conventional Schottky characteristics and to operate as an ohmic contact at the low bias regime. However, the 4H-SiC diodes with the graphite cap still exhibited their good electrical characteristics in spite of a slight increase in the leakage current. Therefore, we found that the graphite cap layer serves well as the protection layer of silicon carbide surface during high-temperature annealing. Based on a closer analysis on electric characteristics, a conductive surface transfiguration layer was suspected to form on the surface of diodes without the graphite cap layer during high-temperature annealing. After removing the surface transfiguration layer using ICP-RIE, Schottky diode without the graphite cap layer and having poor electrical characteristics showed a dramatic improvement in its characteristics including the ideality factor[${\eta}$] of 1.23, the schottky barrier height[${\Phi}$] of 1.39 eV, and the leakage current of $7.75\{times}10^{-8}\;A/cm^{2}$ at the reverse bias of -10 V.

A study on I-V characteristics in JBS rectifiers according to PN junction structures (JBS(Junction Barrier-controlled Schottky)정류기의 PN접합구조에 따른 I-V 특성에 관한 연구)

  • 안병목;정원채
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.1
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    • pp.13-20
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    • 2000
  • In this paper, we demonstrated an analytical description method of forward votage drop and reverse leakage current of the junction barrier controlled schottky rectifier with linearly graded junction and abrupt junction models. In this case, the vertical depths of device are 1[${\mu}{\textrm}{m}$] and 2[${\mu}{\textrm}{m}$], respectively. Through ion implantation and annealing process, we obtain the data of lateral and depth from implanted 2-dimensional profiles. Also we applied these data to models that indicate the change of depletion each on linearly-graded and abrupt juction as the forward and revers bias. After applied depletion changes to electric characteristics of JBS rectifiers, we calculated the forward I-V, the reverse leakage current and temperatures vs. power dissipations according to each junction. When we compared the rectifier with calculated and measured data, from the calculated results, forward votage drop with linearly graded junction is lower than that of abrupt junction and reverse leakage current with linearly graded junction is lower(≒1$\times$10\ulcorner times) than that of abrupt junction. Also, the power dissipations according to different juction depth(1[${\mu}{\textrm}{m}$], 2[${\mu}{\textrm}{m}$]) of device are calculated. Seeing the calculated results, we confirmed it from analytic model that the rectifier with linearly graded junction retained a low power dissipation up to 600[$^{\circ}C$] in comparison with the rectifier with abrupt junction.

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Assessment of real-time bias correction method for rainfall forecast using the Backward-Forward tracking (Backward-Forward tracking 기반 예측강우 편의보정 기법의 실시간 적용 및 평가)

  • Na, Wooyoung;Kang, Minseok;Kim, Yu-Min;Yoo, Chulsang
    • Proceedings of the Korea Water Resources Association Conference
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    • 2021.06a
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    • pp.371-371
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    • 2021
  • 돌발홍수 예경보시스템의 입력자료로 예측강우가 활용된다. 기상청과 환경부에서는 초단기 예보의 목적으로 MAPLE(McGill Algorithm for Precipitation nowcasting and Lagrangian Extrapolation)을 생산하고 있다. MAPLE은 선행 30분까지의 예측품질은 어느 정도 정확하다고 볼 수 있으나 그 이후 특히 3시간 이상이 되면 예측품질이 크게 떨어지는 문제가 있다. 예측강우의 편의보정을 위한 여러 시도들이 있었으나 호우의 규모 및 이동특성을 고려한 사례는 제한적이다. 호우의 이동특성을 고려해야하는 이유로는 첫째, 예측의 특성상 예측강우가 생성되고 편의보정이 이루어지는 시간 동안 호우는 이동을 하기 때문이다. 둘째, 호우가 이동을 하면서 편의보정의 대상이 되는 지역에 적합한 보정계수의 결정이 어렵기 때문이다. 마지막으로 돌발홍수는 장마와 같은 전선형 강수가 아닌 국지성 호우와 같이 빠르게 움직이며 강한 호우를 내리는 강수에 의해 발생하기 때문이다. 본 연구에서는 이러한 문제점을 극복하기 위해 호우의 이동특성을 고려하여 예측강우 보정계수를 결정하고 이를 예측강우에 실시간으로 적용할 수 있는 방법을 제시하였다. 이 과정에서 Backward tracking은 미래에 호우가 도달할 지역(대상지역)으로부터 현재 호우가 위치하는 지역을 추적하는데 이용된다. 추적된 지역에서 보정계수가 결정된다. Forward tracking은 현재 호우가 위치하는 지역으로부터 대상지역을 다시 추적하는데 이용된다. 앞서 결정된 보정계수는 대상지역의 예측강우에 적용된다. 해당 방법론을 2019년에 발생한 주요 호우사상에 실시간 적용하고 평가하였다. 그 결과, Backward-Forward tracking 기반 예측강우 보정방법을 적용한 경우에는 실제 관측된 강우와 매우 유사한 보정결과가 도출됨을 확인되었다.

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The Electrical Properties of Gate Oxide due to the Variation of Thickness (두께 변화에 따른 Gate Oxide의 전기적 특성)

  • Park, Jung-Goo;Hong, Nung-Pyo;Lee, Yong-Woo;Kim, Wang-Gon;Hong, Jin-Woong
    • Proceedings of the KIEE Conference
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    • 1999.07d
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    • pp.1931-1933
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    • 1999
  • In this paper, the current and voltage properties on the gate oxide film due to the variation of thickness are studied. The specimen is used for n-ch power MOSFET. It is shows the leakage current and current density characteristics due to the applied electric field when the oxide thickness is each $600[\AA],\;800[\AA]$ and $1000[\AA]$, respectively. We known that the leakage current is a little higher when the voltage as reverse bias contrast with forward bias in poly gate is applied. In order to experiment for AC properties is measured for capacitance characteristics. It is confirmed that the value of input capacitance have been a lot of influenced on $SiO_2$ thickness contrast with the value of output capacitance.

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Electrical characteristics of Au/3C-SiC/Si/Al Schottky, diode (Au/3C-SiC/Al 쇼터키 다이오드의 전기적 특성)

  • Shim, Jae-Cheol;Chung, Gwiy-Sang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.65-65
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    • 2009
  • High temperature silicon carbide Schottky diode was fabricated with Au deposited on poly 3C-SiC thin film grown on p-type Si(100) using atmospheric pressure chemical vapor deposition. The charge transport mechanism of the diode was studied in the temperature range of 300 K to 550 K. The forward and reverse bias currents of the diode increase strongly with temperature and diode shows a non-ideal behavior due to the series resistance and the interface states associated with 3C-SiC. The charge transport mechanism is a temperature activated process, in which, the electrons passes over of the low barriers and in turn, diode has a large ideality factor. The charge transport mechanism of the diode was analyzed by a Gaussian distribution of the Schottky barrier heights due to the Schottky barrier inhomogeneities at the metal-semiconductor interface and the mean barrier height and zero-bias standard deviation values for the diode was found to be 1.82 eV and $s_0$=0.233 V, respectively. The interface state density of the diode was determined using conductance-frequency and it was of order of $9.18{\times}10^{10}eV^{-1}cm^{-2}$.

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The Reliability of Balance, Gait, and Muscle Strength Test for the Elderly with Dementia: A Systematic Review

  • Lee, Han-Suk;Park, Sun-Wook
    • Journal of the Korean Society of Physical Medicine
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    • v.12 no.3
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    • pp.49-58
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    • 2017
  • PURPOSE: To summarize the evaluation tools of balance [Berg Balance Scale (BBS), timed up and Go (TUG), forward reaching test (FRT)], gait [6 m walking Test (6MWT)], and strength [Chair Stand Test (CST)] for patients with dementia. METHODS: The following databases were searched: Pub MED, Cochrane, Sciences Direct, and Web of Sciences. The inclusion criteria were as follows: 1) repeated measurement design, 2) subjects with dementia, 3) use of testing tools such as the BBS, TUG, FRT, 6MWT, and CST, 4) report the reliability. One reviewer performed the quality assessment of diagnostic accuracy study and two evaluators performed data extraction independently. RESULTS: Six articles and one letter were included. The interrater reliability of 6MWT, TUG, and CST, were acceptable (ICC>.90). However, FRT had unacceptable reliability. In test-retest reliability, only BBS has acceptable reliability (ICC>.90). Others had various reliabilities. The risk of interrater reliability bias was low in all studies. However, the risk of bias of intrarater reliability was low in five studies and moderate in two studies. CONCLUSION: The interrater reliability of the 6MWT, TUG, and CST were acceptable. However, in test-retest reliability, only BBS has acceptable reliability. Therefore, we suggest the use of BBS to test the balance of dementia patients. In addition, the study of tool reliability according to the subtype of dementia is needed in the future.

A Study of the Relationship Analysis of Power Conversion and Changed Capacitance in the Depletion Region of Silicon Solar Cell

  • Kim, Do-Kyeong;Oh, Yeong-Jun;Kim, Sang-Hyun;Hong, Kyeong-Jin;Jung, Haeng-Yeon;Kim, Hoy-Jin;Jeon, Myeong-Seok
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.4
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    • pp.177-181
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    • 2013
  • In this paper, silicon solar cells are analyzed regarding power conversion efficiency by changed capacitance in the depletion region. For the capacitance control in the depletion region of silicon solar cell was applied for 10, 20, 40, 80, 160 and 320 Hz frequency band character and alternating current(AC) voltage with square wave of 0.2~1.4 V. Academically, symmetry formation of positive and negative change of the p-n junction is similar to the physical effect of capacitance. According to the experiment result, because input of square wave with alternating current(AC) voltage could be observed to changed capacitance effect by indirectly method through non-linear power conversion (Voltage-Current) output. In addition, when input alternating current(AC) voltage in the silicon solar cell, changed capacitance of depletion region with the forward bias condition and reverse bias condition gave a direct effect to the charge mobility.

Resistive Switching Characteristics of TiO2 Films with -Embedded Co Ultra Thin Layer

  • Do, Young-Ho;Kwak, June-Sik;Hong, Jin-Pyo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.1
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    • pp.80-84
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    • 2008
  • We systematically investigated the resistive switching properties of thin $TiO_2$ films on Pt/Ti/$SiO_2$/Si substrates that were embedded with a Co ultra thin layer. An in-situ sputtering technique was used to grow both films without breaking the chamber vacuum. A stable bipolar switching in the current-voltage curve was clearly observed in $TiO_2$ films with an embedded Co ultra thin layer, addressing the high and low resistive state under a bias voltage sweep. We propose that the underlying origin involved in the bipolar switching may be attributed to the interface redox reaction between the Co and $TiO_2$ layers. The improved reproducible switching properties of our novel structures under forward and reverse bias stresses demonstrated the possibility of future non-volatile memory elements in a simple capacitive-like structure.

250 mV Supply Voltage Digital Low-Dropout Regulator Using Fast Current Tracking Scheme

  • Oh, Jae-Mun;Yang, Byung-Do;Kang, Hyeong-Ju;Kim, Yeong-Seuk;Choi, Ho-Yong;Jung, Woo-Sung
    • ETRI Journal
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    • v.37 no.5
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    • pp.961-971
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    • 2015
  • This paper proposes a 250 mV supply voltage digital low-dropout (LDO) regulator. The proposed LDO regulator reduces the supply voltage to 250 mV by implementing with all digital circuits in a$0.11{\mu}m$ CMOS process. The fast current tracking scheme achieves the fast settling time of the output voltage by eliminating the ringing problem. The over-voltage and under-voltage detection circuits decrease the overshoot and undershoot voltages by changing the switch array current rapidly. The switch bias circuit reduces the size of the current switch array to 1/3, which applies a forward body bias voltage at low supply voltage. The fabricated LDO regulator worked at 0.25 V to 1.2 V supply voltage. It achieved 250 mV supply voltage and 220 mV output voltage with 99.5% current efficiency and 8 mV ripple voltage at $20{\mu}A$ to $200{\mu}A$ load current.