• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.2
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• pp.293-298
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• 2009

In this contribution, a 193-bit elliptic curve cryptography coprocessor was implemented on an FPGA board. Optimized algorithms and numerical expressions which had been verified through C program simulation, should be analyzed again with HDL (hardware description language) such as Verilog, so that the verified ones could be modified to be applied directly to hardware implementation. The reason is that the characteristics of C programming language design is intrinsically different from the hardware design structure. The hardware IP which was double-checked in view of hardware structure together with algoritunic verification, was implemented on the Altera CycloneII FPGA device equipped with ARM9 microprocessor core, to a real chip prototype, using Altera embedded system development tool kit. The implemented finite field calculation IPs can be used as library modules as Elliptic Curve Cryptography finite field operations which has more than 193 bit key length.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.1_2
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• pp.51-58
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• 2004

Most of pubic-key cryptosystems are built on the basis of arithmetic operations defined over the finite field GF$GF(2^m)$ .The other operations of finite fields except addition can be computed by repeated multiplications. Therefore, it is very important to implement the multiplication operation efficiently in public-key cryptosystems. We propose an efficient bit-parallel normal basis multiplier for$GF(2^m)$ fields defined by All-One Polynomials. The gate count and time complexities of our proposed multiplier are lower than or equal to those of the previously proposed multipliers of the same class. Also, since the architecture of our multiplier is regular, it is suitable for VLSI implementation.

• The Journal of Society for e-Business Studies
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• v.9 no.1
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• pp.209-220
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• 2004

If protocol has fast operations and short key length, it can be efficient user authentication protocol. Lenstra and Verheul proposed XTR. XTR have short key length and fast computing speed. Therefore, this can be used usefully in complex arithmetic. In this paper, to design efficient user authentication protocol we used a subgroup of Galois Field to problem domain. Proposed protocol does not use GF(p/sup 6/) that is existent finite field, and uses GF(p²) that is subgroup and solves problem. XTR-ElGamal based user authentication protocol reduced bit number that is required when exchange key by doing with upside. Also, proposed protocol provided easy calculation and execution by reducing required overhead when calculate. In this paper, we designed authentication protocol with y/sub i/ = g/sup b.p/sup 2(i-1)//ㆍv mol q, 1(equation omitted) 3 that is required to do user authentication.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.68 no.4
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• pp.523-531
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• 2019

This paper deals with a wound-field synchronous machines(WFSM), with an electromagnet on its salient rotor, as an alternative to a permanent magnet in the rotor. We then examine the power performance characteristics, loss characteristics, V-curves and large short-circuit ratios for a large-scale synchronous generator, considering the leading and lagging operations, based on the finite-element method. We predict the performance of a 100MVA-class generator based on the operating range for a constant short-circuit ratio. At the last, We compared with the electromagnetic characteristics of three model according to number of slots.

• Journal of the Korean Society for Precision Engineering
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• v.13 no.5
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• pp.104-114
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• 1996

For the improvement of productivity, the reduction of cost and time for manufacturing is mandatory, especially in the field of electromic industry. The study is concerned with a practical means of systematic assistance to formability estimation and selection of reliable design specification for electronic sheet metal parts. The objective of this research work is to develop a simulation system which hops to analyze the target processes with the finite element method and to acquire available design data quickly and exactly. The simulation system developed in the study consists of design verification, selection of optimal combination of parameters, knowledge acquisition and graphical user interface(GUI). Design verification is automatically carried out by using the finite element method. A data base management system and nomograms are utilized for knowledge acquisition. The developed system has been applied to some major sheet metal forming operations such as flanging, embossing, bending and blanking. According to the simulated results, the validation of the target processes has been confirmend. Analysis data, estimation rules of formability and graphical representation of the analysis have been employed for the designer's understanding and evaluation, thus providing a practical means of robust design and evaluation of forma- bility for producing electronic sheet metal parts.

• Journal of the Korea Society of Computer and Information
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• v.9 no.2
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• pp.105-113
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• 2004

If the protocol has fast operations and short key length, it can be efficient user authentication protocol Lenstra and Verheul proposed XTR. XTR have short key length and fast computing speed. Therefore, this can be used usefully in complex arithmetic. In this paper, to design efficient user authentication protocol we used a subgroup of Galois Field to problem domain. Proposed protocol does not use GF($p^6$) that is existent finite field, and uses GF($p^2$) that is subgroup and solves problem. XTR-ElGamal based user authentication protocol reduced bit number that is required when exchange key by doing with upside. Also, Proposed protocol provided easy calculation and execution by reducing required overhead when calculate. In this paper, we designed authentication protocol that is required to do user authentication.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.4
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• pp.621-628
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• 2017

The efficiency of implementation of the arithmetic operations in finite fields depends on the choice representation of elements of the field. It seems that from this point of view normal bases are the most appropriate, since raising to the power 2 in $GF(2^n)$ of characteristic 2 is reduced in these bases to a cyclic shift of the coordinates. We, in this paper, introduce our algorithm to transform fastly the conventional bases to normal bases and present the result of H/W implementation using the algorithm. We also propose our algorithm to calculate the multiplication and inverse of elements with respect to normal bases in $GF(2^n)$ and present the programs and the results of H/W implementations using the algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.12
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• pp.1609-1617
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• 2019

Described in this paper is a design of hardware accelerator for implementing public-key cryptographic protocols (PKCPs) based on Elliptic Curve Cryptography (ECC) and RSA. It supports five elliptic curves (ECs) over GF(p) and three key lengths of RSA that are defined by NIST standard. It was designed to support four point operations over ECs and six modular arithmetic operations, making it suitable for hardware implementation of ECC- and RSA-based PKCPs. In order to achieve small-area implementation, a finite field arithmetic circuit was designed with 32-bit data-path, and it adopted word-based Montgomery multiplication algorithm, the Jacobian coordinate system for EC point operations, and the Fermat's little theorem for modular multiplicative inverse. The hardware operation was verified with FPGA device by implementing EC-DH key exchange protocol and RSA operations. It occupied 20,800 gate equivalents and 28 kbits of RAM at 50 MHz clock frequency with 180-nm CMOS cell library, and 1,503 slices and 2 BRAMs in Virtex-5 FPGA device.

• Journal of IKEEE
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• v.22 no.3
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• pp.522-531
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• 2018

A public-key cryptography processor EC-RSA was designed, which integrates a 224-bit prime field elliptic curve cryptography (ECC) defined in the FIPS 186-2 as well as RSA with 2048-bit key length into a single hardware structure. A finite field arithmetic core used in both scalar multiplication for ECC and exponentiation for RSA was designed with 32-bit data-path. A lightweight implementation was achieved by an efficient hardware sharing of the finite field arithmetic core and internal memory for ECC and RSA operations. The EC-RSA processor was verified by FPGA implementation. It occupied 11,779 gate equivalents (GEs) and 14 kbit RAM synthesized with a 180-nm CMOS cell library and the estimated maximum clock frequency was 133 MHz. It takes 867,746 clock cycles for ECC scalar multiplication resulting in the estimated throughput of 34.3 kbps, and takes 26,149,013 clock cycles for RSA decryption resulting in the estimated throughput of 10.4 kbps.

• Geomechanics and Engineering
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• v.30 no.5
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• pp.423-435
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• 2022

Ground vibration generated repeatedly in blasting tunnel excavation sites is known to be one of the major hazards induced by blasting operations. Various studies have been conducted to minimize these hazards, both theoretical and empirical methods using electronic detonator, the deck charge method, the center-cut method among others Among these various existing methods for controlling the ground vibration, in this study, we investigated the cut method. In particular, we analyzed and compared the V-cut method, which is commonly used in tunnel blasting, to the double-drilled parallel method, which has recently been introduced in tunnel excavation site. To understand the rock fragmentation efficiency as well as the ground vibration controllability of the two methods, we performed in-situ field blasting tests with both cut methods at a tunnel excavation site. Additionally, numerical analysis by FLAC3D has been executed for a better understanding of fracture propagation pattern and ground vibration generation by each cut method. Ground vibration levels, by PPVs measured in field blasting tests and PPVs estimated in numerical simulations, showed a lower value in the double-drilled parallel compared with the V-cut method, although the exact values are quite different in field measurement and numerical estimation.