• Title/Summary/Keyword: Field Effect Mobility

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A Study on the Electrical Characteristics of Low Temperature Polycrystalline Thin Film Transistor(TFT) using Silicide Mediated Crystallization(SMC) (금속유도 결정화를 이용한 저온 다결정 실리콘 TFT 특성에 관한 연구)

  • 김강석;남영민;손송호;정영균;주상민;박원규;김동환
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.03a
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    • pp.129-129
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    • 2003
  • 최근에 능동 영역 액정 표시 소자(Active Matrix Liquid Crystal Display, AMLCD)에서 고해상도와 빠른 응답속도를 요구하게 되면서부터 다결정 실리콘(poly-Si) 박막 트랜지스터(Thin Film Transistor, TFT)가 쓰이게 되었다. 그리고 일반적으로 디스플레이의 기판을 상대적으로 저가의 유리를 사용하기 때문에 저온 공정이 필수적이다. 따라서 새로운 저온 결정화 방법과 부가적으로 최근 디스플레이 개발 동향 중 하나인 대화면에 적용 가능한 공정인 금속유도 결정화 (Silicide Mediated Crystallization, SMC)가 연구되고 있다. 이 소자는 top-gated coplanar구조로 설계되었다. (그림 1)(100) 실리콘 웨이퍼위에 3000$\AA$의 열산화막을 올리고, LPCVD로 55$0^{\circ}C$에서 비정질 실리콘(a-Si:H) 박막을 550$\AA$ 증착 시켰다. 그리고 시편은 SMC 방법으로 결정화 시켜 TEM(Transmission Electron Microscopy)으로 SMC 다결정 실리콘을 분석하였다. 그 위에 TFT의 게이트 산화막을 열산화막 만큼 우수한 TEOS(Tetraethoxysilane)소스로 사용하여 실리콘 산화막을 1000$\AA$ 형성하였고 게이트는 3000$\AA$ 두께로 몰리브덴을 스퍼터링을 통하여 형성하였다. 이 다결정 실리콘은 3$\times$10^15 cm^-2의 보론(B)을 도핑시켰다. 채널, 소스, 드래인을 정의하기 위해 플라즈마 식각이 이루어 졌으며, 실리콘 산화막과 실리콘 질화막으로 passivation하고, 알루미늄으로 전극을 형성하였다 그리고 마지막에 TFT의 출력특성과 전이특성을 측정함으로써 threshold voltage, the subthreshold slope 와 the field effect mobility를 계산하였다.

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Improvement of electrical characteristics on SPC-Si TFT employing $H_2$ plasma treatment ($H_2$ 플라즈마를 이용한 SPC-Si TFT의 전기적 특성 향상)

  • Kim, Yong-Jin;Park, Sang-Geun;Kim, Sun-Jae;Lee, Jeong-Soo;Kim, Chang-Yeon;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1238_1239
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    • 2009
  • 본 논문에서는 ELA poly-Si TFT보다 뛰어난 균일도를 갖고, a-Si:H TFT보다 전기적 안정도가 우수한 PMOS SPC-Si TFT의 특성을 연구하였다. SPC-Si의 계면 특성을 향상 시키기 위해 $SiO_2$ 게이트 절연막을 증착하기 전에 Solid Phase Crystalline 실리콘(SPC-Si) 채널 영역에 다양한 H2 플라즈마 처리를 해주었다. PECVD를 이용하여 100W에서 H2 플라즈마 처리를 5분 해주었을 때 SPC-Si TFT의 전기적 특성이 향상되는 것을 볼 수 있는데, $V_{TH}$가 약 -3.91V, field effect mobility가 $22.68cm^2$/Vs, 그리고 Subthreshold swing이 0.64 정도를 보였다. 또한 소자에 Hot carrier stress($V_{GS}$=14.91V, $V_{DS}$=-15V, for 2,000sec)를 주었을 때도 전기적 특성이 변하지 않았으며, 일정한 bias stress($V_{GS}$=-15V, $V_{DS}$=-10V, for 2,000sec)를 가하였을 때도 $V_{TH}$가 증가하지 않았다. 이러한 결과를 통해 SPC-Si가 poly-Si TFT보다 더욱 안정함을 알 수 있었다.

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유기태양전지와 유기발광다이오드에 적용 In-Mo-O 투명 전극의 특성 연구

  • Sin, Yong-Hui;Na, Seok-In;Kim, Jang-Ju;Kim, Han-Gi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.535-536
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    • 2013
  • 본 연구에서는 DC/RF co-sputtering공법을 통해 제작한 In-Mo-O 투명 Mo doping 농도 및 열처리 온도에 따른 전기적, 광학적, 구조적 특성을 분석하고, 최적화된 In-Mo-O 투명전극을 유기태양전지(OPVs)와 유기발광다이오드(OLED)에 적용하여 그 가능성을 평가하였다. Mo doping 농도는 co-sputtering 공정 중 MoO3에 인가되는 radio-frequency (RF) power를 변화시켜 조절되었으며, 투명전극의 광학적 특성 및 전기적 특성 향상을 위해 성막 공정 후 급속 열처리 공정을 온도 별로 진행하였다. In-Mo-O 투명 전극은 Mo 도핑 농도에 영향을 받음을 확인할 수 있었고, 최적화된 Mo doping 파워에서 성막한 In-Mo-O 박막은 급속 열처리 공정 후 면저항 24.57 Ohm/square, 투과도 81.57% (400~1,200 nm wavelength)를 나타내었다. Bulk hetero-junction 기반의 고효율 유기태양전지와 유기발광다이오드 적용하기 위해 본 연구에서 제작된 IMO 투명전극의 구조적 특성, 결정성 및 표면특성은 x-ray diffraction (XRD), atomic force microscopy(AFM), field effect scanning electron microscopy (FE-SEM), High-resolution transmission electron microscopy (HRTEM) 분석을 통해 진행하였다. In-Mo-O 투명 전극상에 제작된 OLEDs와 OPV는 reference ITO 전극에 제작된 OLEDs/OPV와 비교할 때 유사하거나 향상된 특성을 나타내었으며 이는 In-Mo-O 박막이 OLED/OPV용 투명 전극으로 적용이 가능함을 말해준다.

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Characteristics of poly-Si TFTs using Excimer Laser Annealing Crystallization and high-k Gate Dielectrics (Excimer Laser Annealing 결정화 방법 및 고유전 게이트 절연막을 사용한 poly-Si TFT의 특성)

  • Lee, Woo-Hyun;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.1
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    • pp.1-4
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    • 2008
  • The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

Optimization of a-IGZO Thin-Film Transistors for OLED Applications

  • Chung, Hyun-Joong;Yang, Hui-Won;Kim, Min-Kyu;Jeong, Jong-Han;Ahn, Tae-Kyung;Kim, Kwang-Suk;Kim, Eun-Hyun;Kim, Sung-Ho;Im, Jang-Soon;Choi, Jong-Hyun;Park, Jin-Seong;Jeong, Jae-Kyeong;Mo, Yeon-Gon;Kim, Hye-Dong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1097-1100
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    • 2008
  • We demonstrate that the performance of amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFT) can be optimized by controlling the interfaces between IGZO and sandwiching insulators and by proper deposition of IGZO layer. Specifically, contact and channel resistances are decreased by reducing IGZO bulk resistance and optimizing dry-etch process, respectively. Field-effect mobility ($\mu_{FE}$) and subthreshold gate swing (S) are further enhanced by fine-tuning IGZO deposition condition.

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New Process Development for Hybrid Silicon Thin Film Transistor

  • Cho, Sung-Haeng;Choi, Yong-Mo;Jeong, Yu-Gwang;Kim, Hyung-Jun;Yang, Sung-Hoon;Song, Jun-Ho;Jeong, Chang-Oh;Kim, Shi-Yul
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.205-207
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    • 2008
  • The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

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Triple Layer Passivation for Organic Thin-Film Transistors

  • Ryoo, Ki-Hyun;Lee, Cheon-An;Jin, Sung-Hun;Jung, Keum-Dong;Park, Chang-Bum;Lee, Jong-Duk;Shin, Hyung-Cheol;Park, Byung-Gook
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1310-1312
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    • 2005
  • Passivation of organic thin-film transistors (OTFTs) using organic and metal thin-film was presented. Parylene-C and titanium were used as an organic and metal layer, respectively. With the proposed passivation method the degradation of electric parameters of OTFTs was relieved compared with non-passivated devices. Several electric parameters such as on/off current, field-effect mobility, and threshold voltage were shown.

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Investigation of long-term stability of pentacene thin-film transistors encapsulated with transparent $SnO_2$

  • Kim, Woo-Jin;Koo, Won-Hoe;Jo, Sung-Jin;Kim, Chang-Su;Baik, Hong-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1276-1279
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    • 2005
  • The long-term stability of pentacene thin-film transistors (TFTs) encapsulated with a transparent $SnO_2$ thin-film prepared by ion beam assisted deposition (IBAD) was investigated. With a buffer layer of thermally evaporated 100 nm $SnO_2$ film deposited prior to IBAD process, our encapsulated OTFTs sustained its initial field-effect mobility up to one month and then gradually degraded showing only 37% reduction compared to 90% reduction of non-encapsulated OTFTs after 100 days in air ambient. The encapsulated OTFTs also exhibited superior on/off current ratio of over $10^5$ to that of the unprotected devices $({\sim}10^4)$ which was reduced from ${\sim}10^6$ before aging. Therefore, the enhanced long-term stability of our encapsulated OTFTs should be attributed to well protection of permeation of $H_2O$ and $O_2$ into the devices by the IBAD $SnO_2$ thin-film which could be used as an effective inorganic gas barrier for transparent organic electronic devices.

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Organic Thin-Film Transistors based on Alkoxynaphthalene End-capped Divinylbenzene

  • Kim, Yun-Hi;Lee, Dong-Hee;Park, Sung-Jin;Chen, June;Yi, Mi-Hye;Kwon, Soon-Ki
    • Journal of Information Display
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    • v.10 no.3
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    • pp.125-130
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    • 2009
  • The new organic semiconductor, which is composed of a divinylbenzene core unit and alkoxynaphthalene on both sides, 1,4-bis-2-(6-hexyloxy)naphthalen-2-yl-vinylbenzene, was synthesized via Wittig reaction. The obtained oligomer was characterized via FT-IR, mass and elemental analysis, UV-visible spectroscopy, cyclovoltammetry, differential scanning calorimetry (DSC), and thermogravimetric analysis (TGA). The vacuum-evaporated film was characterized via X-ray diffraction and atomicforce microscopy (AFM). It formed a highly ordered polycrystalline vacuum-evaporated film and exhibited a good field-effect performance, with a hole mobility of $0.015cm^2/V{\cdot}s$, an on/off ratio of $1.18{\times}10^5$, and a subthreshold slope of 0.69 V when it was deposited at Ts=$90^{\circ}C$ on HMDS-treated $SiO_2$.

Organic Thin Film Transistors for Liquid Crystal Display Fabricated with Poly 3-Hexylthiophene Active Channel Layer and NiOx Electrodes

  • Oh, Yong-Cheul
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.12
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    • pp.1140-1143
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    • 2006
  • We report on the fabrication of P3HT-based thin-film transistors (TFTs) for liquid crystal display that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (S/D) electrodes, gate dielectric layer, and gate electrode, respectively The $NiO_x$ S/D electrodes of which the work function is well matched to that of P3HT are deposited on a P3HT channel by electron-beam evaporation of NiO powder. The maximum saturation current of our P3HT-based TFT is about $15{\mu}A$ at a gate bias of -30 V showing a high field effect mobility of $0.079cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^5$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality P3HT-based TFT.