• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.7
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• pp.575-580
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• 2007

A 16 Mb 1T1C FeRAM device was integrated with BLT capacitors. But a lot of cells were failed randomly during the measuring the bit-line signal distribution of each cell. The reason was revealed that the grain size and orientation of the BLT thin film were severely non-uniform. And the grain size and orientation were severely affected by the process conditions of post heat treatment, especially nucleation step. The optimized annealing temperature at the nucleation step was $560^{\circ}C$. The microstructure of the BLT thin film was also varied by the annealing time at the step. The longer process time showed the finer grain size. Therefore, the uniformity of the grain size and orientation could be improved by changing the process conditions of the nucleation step. The FeRAM device without random bit-fail cell was successfully fabricated with the optimized BLT capacitor and the sensing margin in bit-line signal distribution of it was about 340 mV.

• Journal of the Korean Vacuum Society
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• v.9 no.2
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• pp.136-143
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• 2000

$SrBi_2Ta_2O_9;(SBT)$ films were deposited on p-type Si(100) at room temperature by rf magnetron sputtering method to confirm the possibility of application of $Pt/SBT/Pt/Ti/SiO_2/Si$ structure (MFM) for destructive read out ferroelectric RAM (random access memory). Their structural characteristics with the various annealing times and Ar/$O_2$ gas flow ratios in sputtering were observed by XRD (X-ray diffractometer) and the surface morphologies were observed by FE-SEM (field emission scanning electron microscopy), and their electrical properties were observed by P-V (polarization-voltage measurement) and I-V (current-voltage measurement). The Ar/$O_2$ gas flow ratios of sputtering gas were changed from 1 : 4 to 4 : 1 and SBT thin films were deposited at room temperature. The films show (105), (110) peaks of SBT by XRD measurement. SBT thin films deposited at room temperature were crystallized by furnace annealing at 80$0^{\circ}C$ in oxygen atmosphere during either one hour or two hours. Among their electrical properties, P-V curves showed shaped hysteresis curves, but the SBT thin films showed the asymmetric ferroelectric properties in P-V curves. When Ar/$O_2$ gas flow ratios are 1 : 1, 2: 1, the leakage current density values of SBT thin films are good, those values of 3 V, 5 V, and 7 V are respectively $3.11\times10^{-8} \textrm{A/cm}^2$, $5\times10^{-8}\textrm{A/cm}^2$, $7\times10^{-8}\textrm{A/cm}^2$.After two hours of annealing time, their electrical properties and crystallization are improved.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.192-193
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• 2006

A 16Mb ITIC FeRAM device was fabricated with BLT capacitors. The average value of the switchable 2 polarization obtained m the 32k-array (unit capacitor size: 068 ${mu}m^2$) capacitors was about 16 ${\mu}C/cm^2$ at 3V and the uniformity within an 8-inch wafer was about 2.8%. But a lot of cells were failed randomly during the measuring the bit-line signal of each cell. It was revealed that the Grain size and orientation of the BLT thin film were severely non-uniform. Therefore, the uniformity of the grain size and orientation was improved by changing the process conditions of post heat treatment. The temperature of nucleation step was the very effective on varying the microstructure of the BLT thin film. The optimized temperature of the nucleation step was $560^{\circ}C$.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1646-1648
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• 2000

This paper investigated structural and electrical properties of $Y_{2}O_3$ as a buffer layer of sin91r transistor FRAM (ferroelectric RAM). $Y_{2}O_3$ buffer layers were deposited at a low substrate temperature below 400$^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post- annealing temperature, and suppression of interfacial $SiO_2$ layer generation. for a well-fabricated sample, we achieved that leakage current density ($J_{leak}$) in the order of $10^{-7}A/cm2$, breakdown electric field ($E_{br}$) about 2 MV/cm for $Y_{2}O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_{2}O_3$/Si as low as $8.72{\times}10^{10}cm^{-2}eV^{-1}$. The low interface states were obtained from very low lattice mismatch less than 1.75%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.47-50
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• 2000

This paper investigated structural and electrical properties of $Y_2$ $O_3$ as a buffer layer of single transistor FRAM (ferroelectric RAM). $Y_2$ $O_3$ buffer layers were deposited at a low substrate temperature below 40$0^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post-annealing temperature, and suppression of interfacial $SiO_2$ layer generation. For a well-fabricated sample, we achieved that leakage current density ( $J_{leak}$) in the order of 10$^{-7}$ A/$\textrm{cm}^2$, breakdown electric field ( $E_{br}$ ) about 2 MV/cm for $Y_2$ $O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_2$ $O_3$/Si as low as 8.72x1010 c $m^{-2}$ e $V^{-1}$ . The low interface states were obtained from very low lattice mismatch less than 1.75%.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.7
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• pp.592-597
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• 2000

In this study (B $a_{0.5}$/S $r_{0.5}$)Ti $O_3$[BST(50/50)] ceramic thin films were prepared by the Sol-Gel method BST(50/50) stock solution was made and spin-coated on the Indium Tin Oxide(ITO)/glass substrate at 4000 rpm for 30 seconds. The coated films were dried at 35$0^{\circ}C$ for 10 minutes and annealed at 650~75$0^{\circ}C$ for 1 hour. The microstructural properties of the BST(50/50) thin film were studied by the XRD and AFM. The ferroelectric perovskite phase was formed at the annealing condition of 75$0^{\circ}C$ for 1 hour. Dielectric constant and loss of this thin were 370, 3.7% at room temperature respectively. The polarization switching voltage showed the good value of 3V. The leakage current density of the BST(50/50) thin film was 10$^{-7A}$c $m^2$with applied voltage of 1.5V. BST(50/50) thin film capacitors having good dielectric and electrical properties are expecting for the application to the dielectric material of DRAM.RAM.M.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.352-355
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• 2003

[ $Bi_{3.25}La_{0.75}Ti_3O_{12}$ ] (BLT) thin films were prepared by using metal organic decomposition method onto the LaNiO3 (LNO) bottom electrode. Both the structure and morphology of the films were analyzed by x-ray diffraction (XRD) and atomic force microscope (AFM). Even at low temperatures ranging from 450 to $650^{\circ}C$, the BLT thin films were successfully deposited on LNO bottom electrode and exhibited (117) orientation. The BLT thin films annealed as low as $600^{\circ}C$ showed excellent ferroelectricity, higher remanent polarization and no significant degradation of switching charge at least up to $5{\times}10^9$ switching cycles at a frequency of 100 kHz and 5 V. For the annealing temperature of $600^{\circ}C$, the remanent polarization $P_r$ and coercive field were $23.5\;{\mu}C/cm^2$ and 120 kV/cm, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.279-279
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• 2007

비휘발성 메모리 Fe-RAM은 빠른 정보처리 속도와 전원공급이 차단되었을 때도 계속 정보를 유지할 수 있는 비휘발성 특징과 더불어 저전압, 저전력 구동의 장점이 있어서, 차세대 메모리로 많은 주목을 받고 있다. FeRAM에 사용되는 강유전체는 주로 Pb(Zr,Ti)$O_3$가 적용되었는데, 최근에는 비납계 강유전체의 연구도 활발히 이루어지고 있다. 이러한 비납계 강유전체 중에서 가장 특성이 우수한 물질은 $(Bi,La)_4Ti_3O_{12}$ (BLT) 이다. 그런데 BLT는 결정 방향에 따른 강한 이방성의 강유전 특성을 나타내기 때문에 BLT 박막을 이용하여 Fe-RAM 소자 등을 제작하기 위해서는 결정의 방향성을 세심하게 제어하는 것이 매우 중요하다. 지금까지 연구된 BLT 박막의 방향성 조절결과를 보면, BLT 박막을 스핀 코팅 법 (spin coating method)으로 증착하고, 핵생성 열처리 단계를 조절하여 무작위 방향성을 갖는 박막을 제조하는 방법이 일반적이었다. 그런데 이러한 스핀 코팅법에서의 핵생성 단계의 제어는 공정 조건 확보가 너무 어려운 단점이 있다. 이러한 어려움을 극복할 수 있는 대안은 스퍼터링 증착법(sputtering deposition method), PLD (pulsed laser deposition)법 등과 같은 PVD (physical vapor deposition) 법의 증착방법을 적용하는 것이다. PVD 법으로 증착하는 경우에는 이미 박막 내에 무수한 결정핵이 존재하기 때문에 핵생성 단계가 필요가 없게 된다. PVD 증착법의 적용을 위해서는 타겟의 제조 및 평가 실험이 선행되어야 한다. 그런데 벌크 BLT 재료의 소결공정 조건과 전기적 특성에 관한 연구 결과는 거의 발표가 되지 않고 있다. 본 실험에서는 $Bi_2O_3,\;TiO_2,\;La_2O_3,\;Nb_2O_5\;and\;Al_2O_3$ 분말들을 이용하여 최적의 조성을 구하기 위하여 $Nb^{+5}$ 와 $Al^{+3}$을 $Ti^{+4}$ 자리에 소량 치환시켜 제조하였다. 혼합된 분말을 하소 후 pellet 형태로 성형하여 소결을 실시하였다. 시편을 1mm 두께로 연마하고, 양면에 silver 전극을 인쇄하여 전기적 특성을 측정하였다. 측정결과 $Ti^{+4}$ 자리에 $Nb^{+5}$를 치환하여 제조한 시편에서 $2P_r{\sim}31\;{\mu}c/cm^2$정도의 매우 우수한 특성을 얻었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.410-410
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• 2013

Next-generation nonvolatile memory (NVM) has attracted increasing attention about emerging NVMs such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory and resistance random access memory (RRAM). Previous studies have demonstrated that RRAM is promising because of its excellent properties, including simple structure, high speed and high density integration. Many research groups have reported a lot of metal oxides as resistive materials like TiO2, NiO, SrTiO3 and ZnO [1]. Among them, the ZnO-based film is one of the most promising materials for RRAM because of its good switching characteristics, reliability and high transparency [2]. However, in many studies about ZnO-based RRAMs, there was a problem to get lower current level for reducing the operating power dissipation and improving the device reliability such an endurance and an retention time of memory devices. Thus in this paper, we investigated that highly reproducible bipolar resistive switching characteristics of W doped ZnO RRAM device and it showed low resistive switching current level and large ON/OFF ratio. This may be caused by the interdiffusion of the W atoms in the ZnO film, whch serves as dopants, and leakage current would rise resulting in the lowering of current level [3]. In this work, a ZnO film and W doped ZnO film were fabricated on a Si substrate using RF magnetron sputtering from ZnO and W targets at room temperature with Ar gas ambient, and compared their current levels. Compared with the conventional ZnO-based RRAM, the W doped ZnO ReRAM device shows the reduction of reset current from ~$10^{-6}$ A to ~$10^{-9}$ A and large ON/OFF ratio of ~$10^3$ along with self-rectifying characteristic as shown in Fig. 1. In addition, we observed good endurance of $10^3$ times and retention time of $10^4$ s in the W doped ZnO ReRAM device. With this advantageous characteristics, W doped ZnO thin film device is a promising candidates for CMOS compatible and high-density RRAM devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.216.1-216.1
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• 2013

PZT 박막은 강유전 특성과 압전소자 특성을 나타내는 물질로 DRAM (dynamic random acess memory)과 FRAM (ferroelectric RAM) 등의 기억소자용 capacitor와 MEMS (micro electro mechanical system) 소자의 압전 물질로 사용하기 위한 연구가 진행중에 있다. 하지만 이러한 연구에서는 PZT 박막의 전기적 특성 향상을 주목적으로 연구가 진행되어 왔다. 특히, 박막 공정중 발생하는 plasma에 의한 PZT의 전기적 특성 변화가 박막 표면의 물리적 변화에 기인할 것으로 추정하고 있지만 이에 대한 구체적인 연구는 미비하다. 이 연구에서는 plasma에 의한 PZT 박막 표면의 물리적 특성 변화를 연구하기 위하여 PZT 박막을 sol-gel을 이용하여 Si 기판위에 약 100 nm의 두께로 증착하였으며, 이후 최대 300 W의 Ar plasma로 plasma power을 증가시켜 각각 10분간 plasma처리를 실시하였다. PZT 박막 표면의 nano-mechanics 특성을 분석하기 위하여 Nano-indenter와 Kelvin Probe Force Microscopy (KPFM)을 사용하여 surface hardness, surface morphology를 확인하였고 특히, surface potential 분석을 통하여 PZT 박막 표면의 plasma에 의한 박막 극 표면의 전기적 특성 변화를 연구하였다. 이 연구로 plasma에 의한 PZT 박막은 표면으로부터 최대 43 nm 깊이에서의 hardness는 최대 5.1 GPa에서 최소 4.3 GPa의 분포로 plasma power 변화에 의한 특성은 측정 불가능하였다. 이는 plasma에 의한 영향이 시료 극 표면에 국한되어 나타나기 때문으로 추정되며 이를 보완하기 위하여 surface potential을 분석하였다. 결과에 의하면 plasma power가 0 W에서 300 W로 증가함에 따라 potential이 30 mV에서 -20 mV로 감소하였으나 potential의 분산은 100 W에서 최대인 17 mV로 측정되었으며, 이때 RMS roughness역시 가장 높은 20.145 nm로 측정되었다. 특히, 100 W에서 potential에서는 물결 모양과 같은 일정한 패턴의 potential 무늬가 확인되었다.