• Title/Summary/Keyword: Fast-Switching

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Use of 1.7 kV and 3.3 kV SiC Diodes in Si-IGBT/ SiC Hybrid Technology

  • Sharma, Y.K.;Coulbeck, L.;Mumby-Croft, P.;Wang, Y.;Deviny, I.
    • Journal of the Korean Physical Society
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    • v.73 no.9
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    • pp.1356-1361
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    • 2018
  • Replacing conventional Si diodes with SiC diodes in Si insulated gate bipolar transistor (IGBT) modules is advantageous as it can reduce power losses significantly. Also, the fast switching nature of the SiC diode will allow Si IGBTs to operate at their full high-switching-speed potential, which at present conventional Si diodes cannot do. In this work, the electrical test results for Si-IGBT/4HSiC-Schottky hybrid substrates (hybrid SiC substrates) are presented. These substrates are built for two voltage ratings, 1.7 kV and 3.3 kV. Comparisons of the 1.7 kV and the 3.3 kV Si-IGBT/Si-diode substrates (Si substrates) at room temperature ($20^{\circ}C$, RT) and high temperature ($H125^{\circ}C$, HT) have shown that the switching losses in hybrid SiC substrates are miniscule as compared to those in Si substrates but necessary steps are required to mitigate the ringing observed in the current waveforms. Also, the effect of design variations on the electrical performance of 1.7 kV, 50 A diodes is reported here. These variations are made in the active and termination regions of the device.

A 23.52µW / 0.7V Multi-stage Flip-flop Architecture Steered by a LECTOR-based Gated Clock

  • Bhattacharjee, Pritam;Majumder, Alak;Nath, Bipasha
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.3
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    • pp.220-227
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    • 2017
  • Technology development is leading to the invention of more sophisticated electronics appliances that require long battery life. Therefore, saving power is a major concern in current-day scenarios. A notable source of power dissipation in sequential structures of integrated circuits is due to the continuous switching of high-frequency clock signals, which do not carry any information, and hence, their switching is eliminated by a method called clock gating. In this paper, we have incorporated a recent clock-gating style named Leakage Control Transistor (LECTOR)-based clock gating to drive a multi-stage sequential architectures, and we focus on its performance under three different process corners (fast-fast, slow-slow, typical-typical) through Monte Carlo simulation at 18 GHz clock with 90 nm technology. This gating is found to be one of the best gated approaches for multi-stage architectures in terms of total power consumption.

Model Predictive Control for Shunt Active Power Filter in Synchronous Reference Frame

  • Al-Othman, A.K.;AlSharidah, M.E.;Ahmed, Nabil A.;Alajmi, Bader. N.
    • Journal of Electrical Engineering and Technology
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    • v.11 no.2
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    • pp.405-415
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    • 2016
  • This paper presents a model predictive control for shunt active power filters in synchronous reference frame using space vector pulse-width modulation (SVPWM). The three phase load currents are transformed into synchronous rotating reference frame in order to reduce the order of the control system. The proposed current controller calculates reference current command for harmonic current components in synchronous frame. The fundamental load current components are transformed into dc components revealing only the harmonics. The predictive current controller will add robustness and fast compensation to generate commands to the SVPWM which minimizes switching frequency while maintaining fast harmonic compensation. By using the model predictive control, the optimal switching state to be applied to the next sampling time is selected. The filter current contains only the harmonic components, which are the reference compensating currents. In this method the supply current will be equal to the fundamental component of load current and a part of the current at fundamental frequency for losses of the inverter. Mathematical analysis and the feasibility of the suggested approach are verified through simulation results under steady state and transient conditions for non-linear load. The effectiveness of the proposed controller is confirmed through experimental validation.

Computer Aided Identification of Inter-Layer Faults in Gas Insulated Capacitively Graded Bushing during Switching

  • Rao, M.Mohana;Dharani, P.;Rao, T. Prasad
    • Journal of Electrical Engineering and Technology
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    • v.4 no.1
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    • pp.28-34
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    • 2009
  • In a Gas Insulated Substation (GIS), Very Fast Transients (VFTs) are generated mainly due to switching operations. These transients may cause internal faults, i.e., layer-to-layer faults in a capacitively graded bushing as it is one of the most important terminal equipment for GIS. The healthiness of the bushing is generally verified by measuring its leakage current. However, the change in current magnitude/pattern is only marginal for different types of fault conditions. Leakage current monitoring (LCM) systems generate large amounts of data and computer aided interpretation of defects may be of great assistance when analyzing this data. In view of the above, ANN techniques have been used in this study for identification of these minor faults. A single layer perceptron network, a two layer feed-forward back propagation network and cascade correlation (CC) network models are used to identify interlayer faults in the bushing. The effectiveness of the CC network over perceptron and back propagation networks in identification of a fault has been analysed as part of the paper.

Fabrication of a Fast Switching Thyristor by Proton Irradiation (양성자 조사법에 의한 고속스위칭 사이리스터의 제조)

  • Kim, Eun-Dong;Zhang, Chang-Li;Kim, Sang-Cheol;Kim, Nam-Gyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.271-275
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    • 2004
  • A fast switching thyristor with a superior trade-off property between the on-state voltage drop and the turn-off time could be fabricated by the proton irradiation method. After fabricating symmetric thyristor dies with a voltage rating of 1,600V from $350{\mu}m$ thickness of $60{\Omega}cm$ NTD-Si wafer and $200{\mu}m$ width of N-base drift layer, the local carrier lifetime control by the proton irradiation was performed with help of the HI-13 tandem accelerator in China. The thyristor samples irradiated with 4.7MeV proton beam showed a superior trade-off relationship of $V_{TM}=1.55V\;and\;t_q=15{\mu}s$ attributed to a very narrow layer of short carrier lifetime(${\sim}1{\mu}s$) in the middle of its N-base drift region. To explain the small increase of $V_{TM}$, we will introduce the effect of carrier compensation by the diffusion current at the low carrier lifetime region.

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Deduplication and Exploitability Determination of UAF Vulnerability Samples by Fast Clustering

  • Peng, Jianshan;Zhang, Mi;Wang, Qingxian
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.10
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    • pp.4933-4956
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    • 2016
  • Use-After-Free (UAF) is a common lethal form of software vulnerability. By using tools such as Web Browser Fuzzing, a large amount of samples containing UAF vulnerabilities can be generated. To evaluate the threat level of vulnerability or to patch the vulnerabilities, automatic deduplication and exploitability determination should be carried out for these samples. There are some problems existing in current methods, including inadequate pertinence, lack of depth and precision of analysis, high time cost, and low accuracy. In this paper, in terms of key dangling pointer and crash context, we analyze four properties of similar samples of UAF vulnerability, explore the method of extracting and calculate clustering eigenvalues from these samples, perform clustering by fast search and find of density peaks on a large number of vulnerability samples. Samples were divided into different UAF vulnerability categories according to the clustering results, and the exploitability of these UAF vulnerabilities was determined by observing the shape of class cluster. Experimental results showed that the approach was applicable to the deduplication and exploitability determination of a large amount of UAF vulnerability samples, with high accuracy and low performance cost.

A Simple Fast Analog Storage Device and Its Applications (간단한 Analog 기억장치의 제작과 그 응용)

  • In Tae Bae;Q. Won Choi;Ha Suck Kim
    • Journal of the Korean Chemical Society
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    • v.25 no.2
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    • pp.103-109
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    • 1981
  • An inexpensive, yet convenient analog storage device was constructed. Sequentially MOSFET-switched 20 sample and holds equipped with a high input impedance preamplifier were parallelly matched to the digitally controlled shift register system in variable speeds up to 3 kHz. To verify its usefulness, square wave train, sinusiodal wave and some electrochemical data, such as fast-scan voltammogram and transient current-time curves of differential pulse polarography were tested.

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A Study on the Comparison of Full-Bridge Dual Converter for Various Fast Charging System (다양한 급속 충전용 풀브리지 듀얼 컨버터의 비교 연구)

  • Ban, Choong Hwan;Lee, Y.J;Kwon, W.S;Han, D.H;Choe, J.M;Choe, Gyu-Ha;Eun, J.M
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.279-280
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    • 2012
  • In this paper, as a part of studying the fast battery charger, designed the charging system by applying dual converter. This dual converter was applied to the charging system for reducing time by dividing high current which prevents the damage of parts from heating of components. In this paper continued the task by switching the topology of the dual converter for fast charging battery into SISO, PISO, and PIPO. The study to derive the optimized system topology by analyzing the efficiency of charging system.

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Adaptive Time-delayed Control with Integral Sliding-mode Surface for Fast Convergence Rate of Robot Manipulator (로봇 머니퓰레이터에서의 수렴속도 향상을 위한 적분 슬라이딩 모드 기반 적응 시간 제어 기법)

  • Baek, Jae-Min;Kang, Min-Seok
    • IEMEK Journal of Embedded Systems and Applications
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    • v.16 no.6
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    • pp.307-312
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    • 2021
  • This paper proposes an adaptive time-delayed control approach with the integral sliding-mode surface for the fast convergence rate of robot manipulators. Adaptive switching gain aims to guarantee the system stability in such a way as to suppress time-delayed estimation error in the proposed control approach. Moreover, it makes an effort to increase the convergence ability in reaching the phase. An integral sliding-mode surface is employed to achieve a fast convergence rate in the sliding phase. The stability of the proposed one is proved to be asymptotically stable in the Lyapunov stability. The efficiency of the proposed control approach is illustrated with a tutorial example in robot manipulator, which is compared to that of the existing control approach.

Fast Image Compression and Pixel-wise Switching Technique for Hardware Efficient Implementation of Dynamic Capacitance Compensation (하드웨어 효율적인 동적 커패시턴스 보상 구현을 위한 고속 영상 압축 및 화소별 스위칭 기법)

  • Choi, Joon-Hwan;Song, Won-Suk;Choi, Hyuk
    • Journal of KIISE:Software and Applications
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    • v.36 no.8
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    • pp.616-622
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    • 2009
  • Thanks to Dynamic Capacitance Control (DCC) technique, response time of an LCD display has greatly improved. However, DCC requires hi-speed memory for the real-time writing/reading of an image of a previous frame, which results in increases in hardware overhead and cost. In this paper, we propose Modified Exponential Golomb (MEG) coding, a low-complex high-speed image compression method, which can remarkably reduce memory requirement for DCC. We also propose a pixel-wise DCC switching technique to prevent a compression error from affecting the quality of a final image on LCD. In our experiment, the degradation in visual quality was not noticeable when we cut the DCC memory size of 1080i HD data by 1/3.