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A New Block Matching Motion Estimation using Predicted Direction Search Algorithm (예측 방향성 탐색 알고리즘을 이용한 새로운 블록 정합 움직임 추정 방식)

  • Seo, Jae-Su;Nam, Jae-Yeol;Gwak, Jin-Seok;Lee, Myeong-Ho
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.2S
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    • pp.638-648
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    • 2000
  • This paper introduces a new technique for block is matching motion estimation. Since the temporal correlation of the image sequence, the motion vector of a block is highly related to the motion vector of the same coordinate block in the previous image frame. If we can obtain useful and enough information from the motion vector of the same coordinate block of the previous frame, the total number of search points used to find the motion vector of the current block may be reduced significantly. Using that idea, an efficient predicted direction search algorithm (PDSA) for block matching algorithm is proposed. Based on the direction of the blocks of the two successive previous frames, if the direction of the to successive blocks is same, the first search point of the proposed PDSA is moved two pixels to the direction of the block. The searching process after moving the first search point is processed according to the fixed search patterns. Otherwise, full search is performed with search area $\pm$2. Simulation results show that PSNR values are improved up to the 3.4dB as depend on the image sequences and improved about 1.5dB on an average. Search times are reduced about 20% than the other fast search algorithms. Simulation results also show that the performance of the PDSA scheme gives better subjective picture quality than the other fast search algorithms and is closer to that of the FS(Full Search) algorithm.

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A New Fast Motion Search Algorithm Using Motion Characteristics (움직임 특성을 이용한 새로운 고속 움직임 예측 방법)

  • 이성호;노대영;장호연;오승준;안창범
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.2
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    • pp.20-28
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    • 2003
  • Recently we need a faster and more accurate motion vector search algorithm for ASIC(Application Specific IC) or small systems. Block motion estimation using Full Search(FS) algorithm provides the best visual quality and PSNR, but it requires intensive computations. The previously proposed fast algorithms reduced the number of computations by limiting the number of searching locations. This is accomplished at the expense of less accuracy of motion estimation and gives rise to an appreciably higher SAD(Sum of Absolute Difference) for motion compensated images. In this paper we exploit the spatial correlation of motion vectors and present a fast motion estimation scheme which uses the predicted motion vector(PMV). The PMV scheme is more clear and simpler than the previously proposed algorithms which also use adjacent motion vectors. Simulation results with standard video sequences show that the PMV scheme is faster and more accurate than other algorithms such as Nearest-Neighbors Search(NNS) algorithm.

270 MHz Full HD H.264/AVC High Profile Encoder with Shared Multibank Memory-Based Fast Motion Estimation

  • Lee, Suk-Ho;Park, Seong-Mo;Park, Jong-Won
    • ETRI Journal
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    • v.31 no.6
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    • pp.784-794
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    • 2009
  • We present a full HD (1080p) H.264/AVC High Profile hardware encoder based on fast motion estimation (ME). Most processing cycles are occupied with ME and use external memory access to fetch samples, which degrades the performance of the encoder. A novel approach to fast ME which uses shared multibank memory can solve these problems. The proposed pixel subsampling ME algorithm is suitable for fast motion vector searches for high-quality resolution images. The proposed algorithm achieves an 87.5% reduction of computational complexity compared with the full search algorithm in the JM reference software, while sustaining the video quality without any conspicuous PSNR loss. The usage amount of shared multibank memory between the coarse ME and fine ME blocks is 93.6%, which saves external memory access cycles and speeds up ME. It is feasible to perform the algorithm at a 270 MHz clock speed for 30 frame/s real-time full HD encoding. Its total gate count is 872k, and internal SRAM size is 41.8 kB.

$L_2$-Norm Pyramid--Based Search Algorithm for Fast VQ Encoding (고속 벡터 양자 부호화를 위한 $L_2$-평균 피라미드 기반 탐색 기법)

  • Song, Byeong-Cheol;Ra, Jong-Beom
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.39 no.1
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    • pp.32-39
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    • 2002
  • Vector quantization for image compression needs expensive encoding time to find the closest codeword to the input vector. This paper proposes a search algorithm for fast vector quantization encoding. Firstly, we derive a robust condition based on the efficient topological structure of the codebook to dramatically eliminate unnecessary matching operations from the search procedure. Then, we Propose a fast search algorithm using the elimination condition. Simulation results show that with little preprocessing and memory cost, the encoding time of the proposed algorithm is reduced significantly while the encoding quality remains the same with respect to the full search algorithm. It is also found that the Proposed algorithm outperforms the existing search algorithms.

Fast Algorithm Based on Successive Elimination Algorithm for Multi-Reference Motion Estimation (다중 참조영상 움직임 추정에 적응을 위한 연속 제거 알고리즘 기반 고속화 알고리즘)

  • Kim Young-Moon;Lee Jae-Eun;Lim Chan;Kang Hyun-Soo
    • Journal of Korea Multimedia Society
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    • v.8 no.7
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    • pp.889-897
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    • 2005
  • This paper presents a new fast motion estimation algorithm for multi-reference frames. We first analyze the experimental results of the successive elimination algorithm, which is a fast version of full search algorithm, being applied to Multi-reference frames. Based on the analysis, a new scheme for alleviating its computational burden is introduced. In the proposed method, the motion vector for the immediately previous reference frame is found by applying the successive elimination algorithm, while the motion vector for other reference frames is estimated by extrapolation of the already obtained motion vector. Adaptively restricting the motion search area to the local area centered on the estimated motion vector, the proposed method provides dramatic computational complexity reduction but slight quality degradation. The proposed method is evaluated by experiments for some image sequences.

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Design of a motion estimator with systolic array structure (Systolic array 구조를 갖는 움직임 추정기 설계)

  • 정대호;최석준;김환영
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.10
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    • pp.36-42
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    • 1997
  • In the whole world, the research about the VLSI implementation of motion estimation algorithm is progressed to actively full (brute force) search algorithm research with the development of systolic array possible to parallel and pipeline processing. But, because of processing time's limit in a field to handle a huge data quantily such as a high definition television, many problems are happened to full search algorithm. In the paper, as a fast processing to using parallel scheme for the serial input image data, motion estimator of systolic array structure verifying that processing time is improved in contrast to the conventional full search algorithm.

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Fast fractal coding based on correlation coefficients of subblocks in input image (입력 영상의 서브블록들 사이의 상관관계에 기반한 고속 프랙탈 부호화)

  • 배수정;임재권
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.669-672
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    • 1998
  • In this paper, w epropose a fast fractal coding method based on correlation coefficients of subblocks in input image. In the proposed method, domain pool is selected based on correlation analysis of input image and the isometry transform for each block is chosen based on the IFS method. To investigate the performance of the proposed method, we compared image quality and encoding time with full search PIFS method and jacquin's PIFS method. Experimental results show that proposed method yields nearly the same performance in PSNR, and its encoding time is reduced for images size of 512*512 compared with full search PIFS method and jacquin's PIFS method.

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New Fast Motion Estimation Search With Subsmapling Method (서브샘플링을 이용한 새로운 고속 움직임 예측 알고리즘)

  • 김철중;채병조;오승준;정광수
    • Proceedings of the Korean Information Science Society Conference
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    • 2001.10c
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    • pp.781-783
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    • 2001
  • 동영상을 효율적으로 압축하기 위한 움직임벡터 예측에 관한 많은 연구가 진행되어 왔다. 가장 일반적인 FBMA(Full search-based Block Matching Algorithm)는 화질은 좋지만 계산량이 많기 때문에 실시간 인코딩을 요구하는 시스템에서 사용하는데 문제가 있다. 좋은 화질을 유지하면서 인코딩 속도를 해결하기 위한 많은 알고리즘들이 제안되어 왔지만 ASIC이나 소형 시스템에서 사용할 수 있는 방법이 계속 요구되고 있다. 본 논문에서는 계산량을 더욱 줄여 속도향상을 가져오면서 FBMA와 비숫한 SNR을 유지하는 방법인 NMS(New Fast Motion Estimation Search With Subsmapling Method)를 제안하였다. NMS는 서브샘플림한 값을 이용하여 SAD값을 구하고 또한 새로운 Search를 제안하여 기존 방법들이 제공하는 주관적 화질이나 PSNR을 높게 유지하면서도 속도를 10~15% 정도 개선시킬 수 있다.

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A New Cross and Hexagonal Search Algorithm for Fast Block Matching Motion Estimation (십자와 육각패턴을 이용한 고속 블록 정합 동작 예측 기법)

  • Park, In-Young;Nam, Hyeon-Woo;Wee, Young-Cheul;Kim, Ha-Jine
    • The KIPS Transactions:PartB
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    • v.10B no.7
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    • pp.811-814
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    • 2003
  • In this paper, we propose a fast block-matching motion estimation method using the cross pattern and the hexagonal pattern. For the block-matching motion estimation method, full search finds the best motion estimation, but it requires huge search time because it has to check every search point within the search window. The proposed method makes use of the fact that most of motion vectors lie near the center of block. The proposed method first uses the cross pattern to search near the center of block, and then uses the hexagonal pattern to search larger motion vectors. Experimental results show that our method is better than recently proposed search algorithms in terms of mean-square error performance and required search time.

VLSI Architecture Designs of the Block-Matching Motion Estimation/Compensation using a Modified 4-Step Search Algorithm (변형된 4스텝 써치를 이용한 블럭정합 움직임 추정 및 보상 알고리즘의 VLSI 구조 설계)

  • Lee, Dong-Ho
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.9
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    • pp.86-94
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    • 1998
  • This paper proposes a new fast block-matching algorithm, named MFSS(Modified Four-Step Search) algorithm, which has better performance and is more adequate for hardware realization than the existing fast algorithms. The proposed algorithm is suitable for hardware realization since it has a unique regularity during the search procedure. It is shown from simulation results that its performance is close to that of FS(Full Search) algorithm. This paper also proposes a VLSI architecture and presents some design results of a motion estimator and compensator which adopted the MFSS algorithm. The important aspects considered in designing a motion estimator and compensator are hardware complexity of design results, and total delay needed to generate the motion compensated data after finding the motion vectors. Hardware complexity is minimized by using just nine PE(Process Element)'s, and total delay is minimized by sharing search memory of the motion estimator and compensator.

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