• Title/Summary/Keyword: Fast Information Channel

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Blind Neural Equalizer using Higher-Order Statistics

  • Lee, Jung-Sik
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.2 no.3
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    • pp.174-178
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    • 2002
  • This paper discusses a blind equalization technique for FIR channel system, that might be minimum phase or not, in digital communication. The proposed techniques consist of two parts. One is to estimate the original channel coefficients based on fourth-order cumulants of the channel output, the other is to employ RBF neural network to model an inverse system fur the original channel. Here, the estimated channel is used as a reference system to train the RBF. The proposed RBF equalizer provides fast and easy teaming, due to the structural efficiency and excellent recognition-capability of R3F neural network. Throughout the simulation studies, it was found that the proposed blind RBF equalizer performed favorably better than the blind MLP equalizer, while requiring the relatively smaller computation steps in tranining.

Channel Real location Methodologies for Restorable Transmission Networks

  • Joo, Un-Gi
    • Management Science and Financial Engineering
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    • v.9 no.1
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    • pp.29-49
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    • 2003
  • This paper develops channel reallocation methodologies for survival transmission networks, Any failure on a high-speed telecommunication network needs to be restored rapidly and a channel real-location methodology has an important role for the fast restoration. This paper considers the channel reallocation problems under a line restoration with distributed control, where the line restoration restores the failed channels by rerouting the channels along the two alternative routes. The objective is to determine the optimal number of rerouting channels on the alternative rerouting paths of a given transmission network, where the optimality criteria are the first, the last and the mean restoration times. For each criterion, the problem is formulated as a mixed integer programming and the optimal channel reallocation algorithm is suggested based upon the characterization of the optimal solution.

Performance Analysis of MCDD in an OBP Satellite Communications System

  • Kim, Sang-Goo;Yoon, Dong-Weon
    • Journal of Communications and Networks
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    • v.12 no.6
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    • pp.529-532
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    • 2010
  • Multi-carrier demultiplexer/demodulator (MCDD) in an on-board processing (OBP) satellite used for digital multimedia services has two typical architectures according to the channel demultiplexing procedure: Multistage multi-carrier demultiplexer (M-MCD) or poly-phase fast Fourier transform (PPF). During the channel demultiplexing, phase and quantization errors influence the performance of MCDD; those errors affect the bit error rate (BER) performance of M-MCD and PPF differently. In this paper, we derive the phase error variances that satisfy the condition that M-MCD and PPF have the same signal to noise ratio according to quantization bits, and then, with these results, analyze the BER performances of M-MCD and PPF. The results provided here may be a useful reference for the selection of M-MCD or PPF in designing the MCDD in an OBP satellite communications system.

A fast code acquisition using integrated search and verification (ISV) scheme in the DS-SS system (DS-SS시스템에서 탐색과정과 확인과정을 통합하는 (ISV) 고속부호 포착 시스템)

  • 오성근;임종혁;성상헌;최태영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.5
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    • pp.24-30
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    • 1996
  • In this paper, we propose a fast code acquisition method that can reduce drastically the mean acquisition time of the direct sequence spread spectrum (DS-SS) system by using and integrated search and verification (ISV) scheme. The proposed method performs simultaneously the search and verification processes at every search cell, through storing sufficiently long signal samples enough to perform the verification process form the previously received samples. We analyze and acquisition performance in the case of Gaussian channel to evaluate theacquisition perfomrance of the proposed method. From the simple numericl analysis result, we have shown that the acquisition performance of the proposed method is better than that of the conventional serial search method, and the performance improvement becomes more prominent as the channel environment becomes degraded.

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Performance Analysis of Pilot Patterns for Channel Estimation in OFDM Systems (OFDM 시스템에서 채널 추정을 위한 파일럿 패턴의 성능 분석)

  • Choe, Kwang-Don;Hyun, Deok-Soo;Park, Sang-Kyu
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.8A
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    • pp.664-670
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    • 2005
  • OFDM is a very attractive technique for achieving high-bit-rate data transmission and high spectrum efficiency in fading environment. However, the reliable detection of an OFDM signal in time-varying multipath fading channels is a challenging problem. Accordingly, various channel estimation methods have been proposed for performance improvement. But, conventional pilot patterns for channel estimation in OFDM systems have not robust characteristics relating to various mobile speed. To solve this drawback in conventional patterns, we propose the pilot patterns modified from conventional patterns to have a good error performance in time-varying fading channel. Simulation results show that the performance of the proposed pilot patterns is better than conventional patterns in fast time-varying channel.

Coherent detection scheme for DS-CDMA system with M-ary orthogofnal signaling (M진 직교 신호화를 적용한 DS-CDMA 시스템의 동기 검파 기법)

  • 김기준;권순일;김호준;황금찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.4
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    • pp.1016-1023
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    • 1998
  • DS-CDMA system requeires a power-efficient transmission and reception scheme to increase capacity. In this paper, coherent detection of DS-CDMA system with M-ary orthogonal signaling is considered, and multistage decision-directed channel estimator is proposed. The multistage decision-directed channel estimator is based on the fact that better channel estimation can be obtained by using the final decisions of the detector with a conventional decision-directed channel estimator. In this scheme, symbol detector and channel estimator operate algernaely. by simulation, it is shown that the proposed method achieves performance gain capare to conventional method, specially at low signal to noise ratio over fast time-variant channel with diversity.

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Design of Advanced Metering Infrastructure Network Based on Multi-Channel Cluster (다중채널 클러스터 기반의 AMI 네트워크 설계)

  • Choi, Seok-Jun;Shim, Byoung-Sup;Chae, Soo-Kwon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.3
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    • pp.207-215
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    • 2013
  • This paper is channel assignment and scheduling techniques for efficient wireless AMI network. In AMI system, the multi-channel cluster network to be proposed defines the communication channel between NC (Network Coordinator) and CDA (Clustered Data Aggregator) as the network channel. CDA and OMD(Out Meter display) and communication channel between SMD(Smart Meter Device) are defined as the group channel. AMI network of the multi-channel cluster based in which the network channel and group channel is mixed increases the administration efficiency through the physical/logical consumer channel clustering. The reliability of inspection data through the channel use distinguished between the adjacent cluster is enhanced. In addition, the fast aggregation of data is possible and the size of a metering network is increased through the channel allocation of the multichannel cluster based.

Fast Decoding Method of Distributed Video Based on Modeling of Parity Bit Requests (패리티 비트 요구량 모델링에 의한 분산 비디오의 고속 복호화 기법)

  • Kim, Man-Jae;Kim, Jin-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.11
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    • pp.2465-2473
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    • 2012
  • Recently, as one of low complexity video encoding methods, DVC (Distributed Video Coding) scheme has been actively studied. Most of DVC schemes exploit feedback channel to achieve better coding performances, however, this causes these schemes to have high decoding delay. In order to overcome these, this paper proposes a new fast DVC decoding method using parity-bit request model, which can be obtained by using bit-error rate, sent by encoder with motion vector, which is transmitted through feedback channel by decoder after generating side information. Through several simulations, it is shown that the proposed method improves greatly the decoding speed, compared to the conventional schemes.

Parity Bits Request Estimation Using Motion Information Feedback for Fast Distributed Video Decoding (고속 분산 비디오 복호화를 위한 움직임 정보 피드백을 이용한 패리티 비트 요구량 예측 기법)

  • Kim, Man-jae;Choi, Haechul;Kim, Jin-soo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.107-108
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    • 2012
  • For low complexity encoder, the parity bit transmission through a feedback channel is an essential part of DVC. But feedback channel-based parity bit control is a major cause for the high decoding time latency. In this paper, we propose a fast distributed video decoding by parity bit request estimation using rate-distortion model. Through computer simulations, it is shown that the proposed method can achieve complexity reduction compared to other methods.

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Compact Hardware Multiple Input Multiple Output Channel Emulator for Wireless Local Area Network 802.11ac

  • Khai, Lam Duc;Tien, Tran Van
    • Journal of information and communication convergence engineering
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    • v.18 no.1
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    • pp.1-7
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    • 2020
  • This paper proposes a fast-processing and low-cost hardware multiple input multiple output (MIMO) channel emulator. The channel emulator is an important component of hardware-based simulation systems. The novelty of this work is the use of sharing and pipelining functions to reduce hardware resource utilization while maintaining a high sample rate. In our proposed emulator, the samples are created sequentially and interpolated to ensure the sample rate is equal to the base band rate. The proposed 4 × 4 MIMO requires low-cost hardware resource so that it can be implemented on a single field-programmable gate array (FPGA) chip. An implementation on Xilinx Virtex-7 VX980T was found to occupy 10.47% of the available configurable slice registers and 12.58% of the FPGA's slice lookup tables. The maximum frequency of the proposed emulator is 758.064 MHz, so up to 560 different paths can be processed simultaneously to generate 560 × 758 million × 2 × 32 bit complex-valued fading samples per second.