• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.8
• /
• pp.1527-1533
• /
• 2009

In this paper, we design directional search pattern using motion direction biased characteristics of MVP distribution, and proposes a direction applied cross diamond search method that adaptively change search pattern according to moving direction of search point. Proposed method predict motion vectors from neighbor macro blocks, and define initial motion direction by using predicted motion vectors. It improve search efficiency by using alternately proposed search pattern according to motion direction of BMP in search process. The simulation results show that proposed method is able to fast motion estimation compared with conventional cross diamond search, according as it reduce computational complexity that is required of motion estimation with $0.43%{\sim}1.76%$.

• Journal of the Korean Institute of Telematics and Electronics S
• /
• v.35S no.9
• /
• pp.86-94
• /
• 1998

This paper proposes a new fast block-matching algorithm, named MFSS(Modified Four-Step Search) algorithm, which has better performance and is more adequate for hardware realization than the existing fast algorithms. The proposed algorithm is suitable for hardware realization since it has a unique regularity during the search procedure. It is shown from simulation results that its performance is close to that of FS(Full Search) algorithm. This paper also proposes a VLSI architecture and presents some design results of a motion estimator and compensator which adopted the MFSS algorithm. The important aspects considered in designing a motion estimator and compensator are hardware complexity of design results, and total delay needed to generate the motion compensated data after finding the motion vectors. Hardware complexity is minimized by using just nine PE(Process Element)'s, and total delay is minimized by sharing search memory of the motion estimator and compensator.

• Proceedings of the KIEE Conference
• /
• 2008.07a
• /
• pp.1903-1904
• /
• 2008

이 논문에서는 영상 프레임사이의 움직임 벡터 연구에 기반을 둔 빠른 블록 정합 움직임 추정을 위해 보완된 다이아몬드 탐색 알고리즘을 제안한다. 실험 결과는 제안된 알고리즘이 기존의 다이아몬드 탐색 알고리즘 보다 더 적은 탐색으로 좀 더 빠르게 동작하는 것이 가능하다. 본 알고리즘의 특징은 움직임이 적은 블록에 대해서는 CDS(conjugate direction search) 알고리즘을 적용하여 탐색함으로써 탐색 점의 수를 줄일 수 있어 좀 더 빠르게 움직임 추정을 할 수 있다.

• Journal of KIISE:Information Networking
• /
• v.37 no.2
• /
• pp.162-165
• /
• 2010

In the paper, we propose an algorithm that significantly reduces unnecessary computations, while keeping prediction quality almost similar to that of the full search. In the proposed algorithm, we can reduces only unnecessary computations efficiently by taking different search patterns and error criteria of block matching according to distribution probability of motion vectors. Our algorithm takes only 20~30% in computational amount and has decreased prediction quality about 0~0.02dB compared with the fast full search of the H.264 reference software. Our algorithm will be useful to real-time video coding applications using MPEG-2/4 AVC standards.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.1B
• /
• pp.128-140
• /
• 2000

In this paper, we propose a fast block matching algorithm using the mean absolute error (MAE) of neighbor search point and search region reduction. The proposed algorithm is composed of two stages. At the first stage,the search region is divided into nonoverlapped 3$\times$3 areas and MAE of the center point of each area iscalculated. The minimum MAE value of all the calculated MAE's is determined as reference MAE. At thesecond stage, because the possibility that final motion vector exist near the position of reference MAE is veryhigh, we use smaller search region than first stage, And, using the MAE of center point of each area, the lowerbound of rest search point of each area is calculated and block matching process is performed only at the searchpoints that the lower bound is smaller than reference MAE. By doing so, we can significantly reduce thecomputational complexity while keep the increasement of motion estimation error small.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.1C
• /
• pp.69-77
• /
• 2002

Sine digital signal processing for motion pictures requires huge amount of data computation to store, manipulate and transmit, more effective data compression is necessary. Therefore, the ITU-T recommended H.26x as data compression standards for digital motion pictures. The data compression method that eliminates time redundancies by motion estimation using relationship between picture frames has been widely used. Most video conding systems employ block matching algorithm for the motion estimation and compensation, and the algorithm is based on the minimun value of cast functions. Therefore, fast search algorithm rather than full search algorithm is more effective in real time low data rates encodings such as H.26x. In this paper, motion estimation employing the Nearest-Neighbors algorithm is designed to reduce search time using FPGA, coded in VHDL, and simulated and verified using Xilink Foundation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.24 no.8B
• /
• pp.1506-1517
• /
• 1999

In this paper, we propose two fast block matching algorithm using the distribution of mean absolute difference (MAD) at the search region overlapped with neighbor blocks and pixel subsapmling. The proposed methods use the lower and upper bound of MAD at the overlapped search region which is calculated from the MAD of neighbor block at that search position and MAD between the current block and neighbor block. In the first algorithm, we can reduce the computational complexity by executing the block matching operation at the only necessary search points. That points are selected using the lower bound of MAD. In the second algorithm, we use the statictical distribution of actual MAD which exists between the lower bound and upper bound of MAD. By using the statistical distribution of actual MAD, we can significantly reduce the computational complexity for motion estimation. after striking space key 2 times.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.44 no.1
• /
• pp.49-55
• /
• 2007

To improved the multi-resolution fast hierarchical motion estimation by using de-interlacing algorithm that is effective in term of both performance and VLSI implementation, is proposed so as to cover large search area field-based as well as frame based image processing in SoC design. In this paper, we have simulated a various picture mode M=2 or M=3. As a results, the proposed algorithm achieved the motion estimation performance PSNR compare with the full search block matching algorithm, the average performance degradation reached to -0.7dB, which did not affect on the subjective quality of reconstructed images at all. And acquiring the more desirable to adopt design SoC for the fast hierarchical motion estimation, we exploit foreground and background search algorithm (FBSA) base on the dual arithmetic processor element(DAPE). It is possible to estimate the large search area motion displacement using a half of number PE in general operation methods. And the proposed architecture of MHME improve the VLSI design hardware through the proposed FBSA structure with DAPE to remove the local memory. The proposed FBSA which use bit array processing in search area can improve structure as like multiple processor array unit(MPAU).

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.32 no.1C
• /
• pp.23-33
• /
• 2007

Video compression is essential technique for fast and efficient transmission of a large amount of video data maintaining high quality. Also, motion estimation and motion compensation is most important technique for efficient video compression. A proposed method is improved diamond search method which uses split diamond pattern and rotated diamond pattern. In particular, the proposed method shows superb result when it is used for the sequence with a direction of camera moving. Moreover when it is used for the sequence with little motion, complexity is reduced considerably by using fewer search points. Also, by varying the number of initial search points, the propose method can provide several options in terms of duality or speed. Simulation results shows that the proposed method sustains better visual quality compared with diamond search method and HEXBS even by using fewer search points. Besides, compared with existing methods, it is able to conduct a motion estimation more efficiently by changing the number of search points adaptively according to motion of video data.

• Journal of Broadcast Engineering
• /
• v.3 no.1
• /
• pp.85-92
• /
• 1998

The block matching algorithm is the most popular motion estimation method in image sequence coding. In this paper, we propose a VLSI architecture. for implementing a recently proposed fast bolck matching algorith, which uses spatial correlation of motion vectors and hierarchical searching scheme. The proposed architecture consists of a basic searching unit based on a systolic array and two shift register arrays. And it covers a search range of -32~ +31. By using the basic searching unit repeatedly, it reduces the number of gatyes for implementation. For basic searching unit implementation, a proper systolic array can be selected among various conventional ones by trading-off between speed and hardware cost. In this paper, a structure is selected as the basic searching unit so that the hardware cost can be minimized. The proposed overall architecture is fast enough for low bit-rate applications (frame size of $352{\times}288$, 3Oframes/sec) and can be implemented by less than 20,000 gates. Moreover, by simply modifying the basic searching unit, the architecture can be used for the higher bit-rate application of the frame size of $720{\times}480$ and 30 frames/sec.