• Title/Summary/Keyword: FPLL

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Performance Improvement of Frequency Synchronization in ATSC DTV System using Signal Power at Both Edges of Spectrum (ATSC DTV 시스템에서 스펙트럼 양끝의 신호전력을 이용한 주파수 동기 성능 개선)

  • Song Hyun Keun;Lee Joo Hyung;Kim Jae Moung;Eum Ho Min;Kim Seung Won
    • Journal of Broadcast Engineering
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    • v.10 no.1 s.26
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    • pp.31-42
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    • 2005
  • ATSC DTV system uses FPLL block for acquiring the frequency synchronization. Because the FPLL uses only the pilot signal, the frequency convergence range becomes narrower and it takes a more time to acquire the frequency synchronization as the pilot is distorted. And the spectrum shape around the pilot makes an asymmetric convergence range between the positive frequency offset and the negative frequency offset. This paper proposes the algorithm that requires the Installation of the fitters at the both edges of a VSB spectrum and uses the signal power that passes these filters. The proposed algorithm complements the problems of the asymmetric convergence range and overcomes the performance degradation due to the distortion of a pilot level.

O(1) IP Lookup Scheme (O(1) IP 검색 방법)

  • 이주민;안종석
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.10e
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    • pp.1-3
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    • 2002
  • 백본 라우터에서의 최장 길이 프리픽스 검색(LPM: Longest Prefix Matching) 속도를 향상시키기 위해 활발히 연구된 방식들은 계산 량과 사용 메모리 량을 교환하는 방식들이다. 이러한 방식들은 성능향상을 위해서 대용량의 포워딩 테이블(Forwarding Table)을 캐쉬(Cache)에 저장할 수 있는 소용량 인덱스 테이블(Index Table)로 압축함으로써 고속 캐쉬 접근 회수와 그 계산량은 증가하는 대신 저속 메모리 접근 회수를 줄이는 방식이다.〔1〕본논문에서는 저속 메모리 사용량이 증가하는 반면 저속 메모리의 접근 빈도와 계산량을 동시에 감소시키는 FPLL(Fixed Prefix Length Lookup) 방식을 소개한다. 이 방식은 포워딩 엔트리(Entry)들을 프리픽스의 상위 비트(Bit)에 의해 그룹으로 나누고, 각 그룹에 속하는 엔트리들을 같은 길이로 정렬한다. FPLL에서의 LPM검색은 목적지 주소가 속하는 그룹들의 길이를 계산하여 검색할 최장 프리픽스의 길이를 미리 결정하고, 결정된 프리픽스를 키(key)로 하여 해시 테이블(Hash Table)로 구성된 포워딩 테이블에서 완전 일치(Exact Matching) 검색을 한다. 완전 일치 검색을 위해 같은 그룹에 속한 엔트리들을 정렬할 필요가 있는데 이 정렬을 위해 여분의 포워딩 테이블 엔트리가 생성된다. 3만개 엔트리를 갖는 Mae-West〔2〕 경우에, FPLL방식은 12만개 정도의 여분의 엔트리가 추가로 생성되는 대신에 1번 캐쉬 접근과 O(1)의 복잡도를 갖는 해시 테이블 검색으로 LPM 검색을 수행한다.

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Minus freqeuncy-offset compensation techniques in ATSC DTV receivers (ATSC 지상파 DTV수신기에서의 음의 주파수 옵셋 보상 기법)

  • Song Hyun Keun;Lee Joo Hyung;Kim Jae Moung
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2004.11a
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    • pp.123-127
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    • 2004
  • 지상파 디지털 TV 방식 중의 하나인 ATSC 8-VSB방식은 전송된 데이터 중 유효 데이터의 비율이 높고 채널이 좋은 경우 동기 및 등화 과정이 간단한 장점이 있지만, 실내수신이나 이동수신 환경에서는 동기 및 등차 과정이 어려운 단점이 있다. 현재 주파수 동기에는 FPLL 알고리즘을 이용하고 있는데, 파일롯의 위치에서의 좌우 스펙트럼의 비대칭 및 채널 환경에 따른 파일롯 신호의 감쇄가 발생하여 양의 주파수 옵셋이 발생했을 때에 비해 음의 주파수 옵셋이 발생했을 때의 동기획득이 어려운 단점이 있다. 본 논문은 파일롯 추출필터와 인접된 필터를 통과한 신호의 파워비율을 이용하여 얻은 제어신호를 이용하여, 기존 FPLL의 동작 범위를 넓힘과 동시에 수렴속도를 빠르게 할 수 있는 방법을 제안하였다.

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A Study on the RF Shower System to Extend Interrogating Range for the Low Power RFID Reader System (저출력 RFID 시스템에서 인식거리 확대를 위한 전력 공급용 RF Shower 시스템)

  • Jung, Jin-Wook;Bae, Jae-Hyun;Oh, Ha-Ryoung;Seong, Yeong-Rak;Song, Ho-Jun;Jang, Byeong-Jun;Choi, Kyung;Lee, Jung-Suk;Lee, Hong-Bae;Lee, Hak-Yong;Kim, Jong-Min;Shin, Jae-Cheol;Park, Jun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.55 no.12
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    • pp.526-533
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    • 2006
  • In this paper, we presented the synchronization module between RF shower system and RFID Reader to extend interrogating range on Mobile RFID system, Costas Loop and FPLL(Frequency/phase Lock Loop) were used. We achieved compromised range of 3MHz locking frequency, 1ms locking time and figured out remarkable Hopping frequency of the Reader. The prototype of the new designed RFID system has been tested with ISO18000-6 type-B Tag. The read range between designed RFID Reader and Tag has been measured, it increased triple times by adjusting the Shower system output level.

Design and Fabrication of 10Gb/s FPLL Clock and Data Regeneration Circuit (10Gb/s FPLL 방식 클럭/데이터 재생회로 설계 및 제작)

  • Song, Jae-Ho;Yoo, Tae-Hwan;Park, Chang-Soo
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.12
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    • pp.1-7
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    • 1998
  • in this work, we designed and characterized a 10Gb/s clock and regeneration circuit. The circuit was realized by integrating high-speed ICs and microwave circuits on alumina substrates. The quadri-correlation method was used for frequency and phase-locked loop. The frequency locking range was 150MHz and the rms jitter generated by the circuit was measured to be less than 1.0ps. The clock and data regeneration circuit was successfully applied to 10Gb/s optical receiver.

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An algorithm for pahse detection using weighting function and the design of a phase tracking loop (가중치 함수를 이용한 위상 검출 알고리즘과 위상 추적 루프의 설계)

  • 이명환
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.9A
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    • pp.2197-2210
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    • 1998
  • In the grand alliance (GA) HDTV receiver, a coherent detection is empolyed for coherent demodulation of vestigial side-band (VSB) signal by using frequency and phaselocked loop(FPLL) operating on the pilot carrier. Additional phase tracking loop (PTL) employed to track out phase noise that has not been removed by the FPLL in theGA system. In this paper, we propose an algorithm for phase detection which utilizes a weighting function. The simplest implementation of the proposed algorithm using te sign of the Q channel component can be tractable by imposing a phase detection gain to the loop gain. It is obserbed that the propsoed algorithm has a robust characteristic against the performance of the digital filters used for Q channel estimation. A second goal of this paper is to introduce a gain control algorithm for the PTL in order to provide an effective implementation of the proposed phase detection algorithm. And we design the PTL through the realization of the simplified digital filter for H/W reduction. The proposed algorithms and the designed PTL are evaluated by computer simulation. In spite of using the simplified H/W structure, simulation results show that the proposed algorithms outperform the coventional PTL algorithms in the phase detection and tracking performance.

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A study on the digital carrier recovery loop with adaptive loop bandwidth (적응 루프 대역폭을 가진 디지털 반송파 동기 루프에 관한 연구)

  • 한동석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.8
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    • pp.1774-1781
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    • 1997
  • In this paper, we propose a full digital frequency and phase locked loop for CATV and HDTV receivers adopting VSB modulation. The CATV and HDTV receivers proposed by the Grand-Alliance in USA are ultilizing analog signal processing technology for carrier recovery. By the way, it is not a good architecture for the development of single chip ASIC operating in digital domain. To solve this problem while improving the performance, we first down convert the received r.f. signal to a near baseband signal for a low-rate AD converter and then we use digital signal processing techniques. The proposed system has the frequency pull-in range of -200 KHz +2.50 KHz. Moreover, it has the ability of adaptive loop bandwidth control according to the amount of frequency offset to improve the acquisition time while reducing the phase noise.

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The Method of high speed Frequency Synchronization Using Spectrum correlation in ATSC terrestrial DTV System (스펙트럼 상관관계를 이용한 ATSC 지상파 DTV의 고속 주파수 동기 방법)

  • Lee Joo-Hyung;Song Hyun-Keun;Nam Wan-Ju;Kim Jae-Moung;Kim Seung-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.9A
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    • pp.858-866
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    • 2005
  • This paper proposes the method of frequency synchronization using the spectrum correlation in ATSC terrestrial DTV system. If the spectrum around pilot is severely distorted by multipath or mobile reception environment, the conventional algorithm using the pilot signal makes the estimation error of the frequency offset. Because the proposed algorithm acquires frequency synchronization using the correlation between the received specalm and the standard spectrum without the use of pilot, the proposed method can acquire frequency synchronization faster and more accurate than conventional algorithm. And this paper proposes new method for ATSC frequency synchronization without the use of pilot.