• Journal of Electrical Engineering and information Science
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• v.1 no.1
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• pp.118-128
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• 1996

In safety critical hard real-time systems, a timing fault may yield catastrophic results. In order to eliminate the timing faults from the fast responsive real-time control systems, it is necessary to schedule a code based on high precision timing analysis. Further, the schedulability enhancement by having multiple processors is of wide spread interest. However, although an instruction level parallel processing is quite effective to improve the schedulability of such a system, none of the real-time applications employ instruction level parallel scheduling techniques because most of the real-time scheduling models have not been designed for fine-grain execution. In this paper, we present a timing constraint model specifying high precision timing constraints, and a practical approach for constructing static schedules for a VLIW execution model. The new model and analysis can guarantee timing accuracy to within a single machine clock cycle.

• Journal of Computing Science and Engineering
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• v.3 no.4
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• pp.195-215
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• 2009

Worst-case execution time (WCET) analysis is critical for hard real-time systems to ensure that different tasks can meet their respective deadlines. While significant progress has been made for WCET analysis of instruction caches, the data cache timing analysis, especially for set-associative data caches, is rather limited. This paper proposes an approach to safely and tightly bounding data cache performance by computing the worst-case stack distance of data cache accesses. Our approach can not only be applied to direct-mapped caches, but also be used for set-associative or even fully-associative caches without increasing the complexity of analysis. Moreover, the proposed approach can statically categorize worst-case data cache misses into cold, conflict, and capacity misses, which can provide useful insights for designers to enhance the worst-case data cache performance. Our evaluation shows that the proposed data cache timing analysis technique can safely and accurately estimate the worst-case data cache performance, and the overestimation as compared to the observed worst-case data cache misses is within 1% on average.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.6
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• pp.71-77
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• 2015

In this paper, we propose a scheduling method for signal measurement and control algorithm execution in a multi-motor drive controller. The multi-motor controller which is used for vehicle control receives position/velocity command and performs position/velocity control and current control. Internal resource allocation and control algorithm execution timing are very important when one microcontroller is used for multi-motor drives. The control performance of the velocity control system is verified by varying ADC(Analog to Digital Converter) conversion timing and algorithm execution timing using real experiments.

• Transactions of the Korean Society of Automotive Engineers
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• v.10 no.5
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• pp.114-120
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• 2002

In a distributed real-time control system, it is essential to confirm the timing behavior of all tasks because these tasks of each real-time controller have to finish their processes within the specified time intervals called a deadline. In order to satisfy this objective, the timing analysis of a distributed real-time system such as shcedulability test must be performed during the system design phase. In this study, a simple application of CAN fur a vehicle body network system is formulated to apply to a holistic scheduling analysis, and the worst-case execution time (WCET) and the worst-case end-to-end response time (WCRT) are evaluated in the point of holistic system view.

• International Journal of Automotive Technology
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• v.5 no.4
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• pp.269-276
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• 2004

There has been considerable activity in recent years in developing timing analysis algorithms for distributed real-time control systems. However, it is difficult for control engineers to analyze the timing behavior of distributed real-time control systems because the algorithms was developed in a software engineer's position and the calculation of the algorithm is very complex. Therefore, there is a need to develop a timing analysis tool, which can handle the calculation complexity of the timing analysis algorithms in order to help control engineers easily analyze or develop the distributed real-time control systems. In this paper, an interactive timing analysis tool, called RAT (Response-time Analysis Tool), is introduced. RAT can perform the schedulability analysis for development of distributed real-time control systems. The schedulability analysis can verify whether all real-time tasks and messages in a system will be completed by their deadlines in the system design phase. Furthermore, from the viewpoint of end-to-end scheduling, RAT can perform the schedulability analysis for series of tasks and messages in a precedence relationship.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.1
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• pp.15-25
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• 2005

Embedded systems have a set of tasks to execute. These tasks can be implemented either on application specific hardware or as software running on a specific processor. The design of an embedded system involves the selection of hardware software resources, Partition of tasks into hardware and software, and performance evaluation. An accurate estimation of execution time for extreme cases (best and worst case) is important for hardware/software codesign. A tighter estimation of the execution time bound nay allow the use of a slower processor to execute the code and may help lower the system cost. In this paper, we consider an ARM-based embedded system and developed a tool to estimate the tight boundary of execution time of a task with loop bounds and any additional program path information. The tool we developed is based on an exiting timing analysis tool named 'Cinderella' which currently supports i960 and m68k architectures. We add a module to handle ARM ELF object file, which extracts control flow and debugging information, and a module to handle ARM instruction set so that the new tool can support ARM processor. We validate the tool by comparing the estimated bound of execution time with the run-time execution time measured by ARMulator for a selected bechmark programs.

• Journal of the Korea Society of Computer and Information
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• v.15 no.4
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• pp.37-45
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• 2010

A system which needs timely accuracy has to design and to verify correctly about execution-time for reliability. Accordingly, it is necessary for timing analysis tools, and much previous research worked. In timing analysis tool, there are two methods. One is a static analysis, and the other is a measurement based analysis. A static analysis is able to spend time less than a measurement based analysis method, but has low reliability of analysis result caused by hard to estimate time of I/O caused by various hardware. A measurement based analysis can be close analysis to real result, but it is hard to adapt to actual application, and spend a lot of time to get result of analysis. As such, this paper present a software monitoring architecture to supply reliability of static analysis process. In a presented architecture, it can select target as needed measurement through static analysis, and reuse result of measurement exist. Therefore, The architecture can reduce overload of time and performance for measurement, and improve the reliability which is the worst problem of static analysis.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.6
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• pp.139-143
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• 2018

Arduino, based on open source hardware, is used in many IoT devices, and IoT devices require multitasking for various inputs and outputs. Among the several methods used for multitasking based on Arduino, we compare three methods: Timing Call by using millis(), Simple Timer library method, and Timer library method. In order to measure the execution error caused by measurement and time delay of each method, two situations are created and analyzed. In the first case, 10 random tasks of a certain size are generated to measure the time delay of each method. In the second situation, 10 random tasks of a certain size are generated to compare execution errors caused by the time lag of the Timer library. In the first case, the millis() timing call method and the Simple Timer library method have a similar time delay and the Timer library method has more time delay. In the second situation, an execution error occurred in which small-size tasks were not called back at the correct timing due to the time delay.

• The KIPS Transactions:PartD
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• v.13D no.3 s.106
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• pp.399-404
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• 2006

A real-time system is used for various systems from small embedded systems to distributed enterprise systems. Because it has a characteristic that provides a service on time, developers should make efforts to keep this property about time when developing real-time applications. As the result of research about real-time system indicates, TMO model supports various functions for time processing according to the real-time concept. And it guarantees response time which developers defined. So developers need a point of reference to define deadline and check the correctness of time. This paper proposes an improved PS-Block as an infrastructure of analysis tools for TMO to present a point of reference. There is a problem that the existing PS-Block has overhead caused by a policy making duplicated blocks. As such, this paper implements a PS-Block Timing Model to reduce the overhead due to block duplication, and defines a base class for searching in PS-Block. The PS-Block Timing Model, using an improved PS-Block structure, offers a point of reference of deadline and an infrastructure of execution time analysis according to the PS-Block configuration policy. Therefore, TMO developers can easily verify deadline of real-time methods, and improve reliability, and reduce development terms.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.6
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• pp.133-137
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• 2018

Arduino is a small microcomputer that is used in a variety of industry fields and especially is widely used as an open source hardware IoT device. The multi-tasking method of Arduino is divided into super loop timing and RTOS thread method. The super loop timing method is simple and easy to understand. However, when one task is long, it affects the execution of the next task. In addition, RTOS threading has the advantage of being able to run without being influenced by other work time. However, Arduino, a small microcomputer, has a disadvantage in that, when the number of threads increases, the context switching time of the thread causes additional time not included in the super loop timing method have. In this paper, we use Arduino Uno R3 and FreeRTOS to analyze these different features, and the task for the experiment is to send 8000 digital signals to the built-in LED port. If two tasks of the same size are executed, the super loop method executes 3 ms faster than FreeRTOS multitasking. If multiple tasks are executed simultaneously, superloop type task is sequential execution and difference in execution time between first task and last task is large. FreeRTOS method can be executed concurrently, but execution time delay of about 30 ms occurs in context switching time.