• Transactions on Electrical and Electronic Materials
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• v.1 no.3
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• pp.14-17
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• 2000

Giga bit dynamic random access memory(DRAM) requires the capacitor of high dielectric films. Some metal oxides films have been proposed as the dielectric material . And Pt is one of the most promising electrode materials. However very little has been done in developing the etching technologoy Pt film. Therefore, it is the first priority to develop the technology for plasma etching of Pt film. In this study, the dry etching of Pt film was investigated in Inductively Coupled Plasma(ICP) etching system with Cl$_2$/Ar and HBr/Cl$_2$/Ar gas mixing. X-ray photoelectron spectroscopy (XPS) was used in analysis of sidewall residues for the understanding of etching mechanism. We found the etch residues on the pattern sidewall is mainly Pt-Pt, Pt-Cl and Pt-Br compounds, Etch profile was observed by Scanning Electron Spectroscopy(SEM) . The etch rate of Pt film at 10%, Cl$_2$/90% Ar gas mixing ration was higher than at 100%. Ar. Addition of HBr to Cl$_2$/Ar as an etching gas led to generally higher selectivity to SiO$_2$. And the etch residues were reduced at 5% HBr/5% Cl$_2$/90% Ar gas mixing ration. These pages provide you with an examples of the layout and style which we wish you to adopt during the preparation of your paper, Make the width of abstract to be 14cm.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.1001-1003
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• 1998

In this paper, $Ar^+$ ion laser etching process of single/poly crystalline silicon with $CCl_{2}F_{2}$ gas is studied for MEMS applications. To investigate the effects of process parameters, laser power, gas pressure, scanning speed were varied and multiple scanning was carried out to obtain high aspect ratio. In addition, scanning width was varied to observe the trench profile etched in repeating scanning cycle. From the etching of $2.6{\mu}m$ thick polycrystalline Si deposited on insulator, trench with flat bottom and vertical side wall was obtained and it is possible to apply this results for MEMS applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.177-177
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• 2010

본 연구에서는 반도체용 Si wafer에 마스크 공정 및 slit etching 공정을 적용하여 목표인 30um 이하의 Probe unit을 개발하기 위해 Deep Si Etching(DRIE) 장비를 이용하여 식각 공정에 따른 특성을 평가하였다. 마스크는 Probe block 조립에 적합한 패턴으로 설계 하였으며, slit의 에칭된 지점에 pin이 삽입될 수 있도록 그 폭을 최소한으로 설계하였다. 30um pitch와 20um pitch의 마스크를 각각 설계하여 포토공정에 의해 마스크패턴을 제작하였으며, 식각공정 결과 식각율 5um/min, profile angle $89^{\circ}{\pm}1^{\circ}$로 400um wafer의 양면관통 식각을 확인하였으며, 표면 및 단면 식각특성을 조사하였다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.4
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• pp.84-91
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• 1985

Acute angle etching Process of thermally grown silicon dioxide layer has been Proposed by depositing a thin layer of silicafilm on the thermal oxide layer. As densification temper-ature of silicafilm is varied from 175$^{\circ}C$ to 1,15$0^{\circ}C$, taper angles from 3$^{\circ}$ to 40$^{\circ}$ are ob-tained. Analytical model of the acute angle etching process has also been presented and etched profile equations of the silicon dioxide layer have been derived using format's principle of lease time. Etched profiles obtained from scanning electron microscope analysis show good agreement with the theoretically calculated profiles.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.659-660
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• 2006

High-aspect-ratio(max. 12.5) microchannels with excellent surface quality and good shape uniformity have been realized utilizing laser-induced etching technique. Etch width and depth variations depend largely upon process variables such as laser power and etchant concentration. Etchant concentration in association with viscosity also influence on the cross-sectional profile of the channels. The optimum process conditions for the fabrication of high-aspect-ratio microchannels applicable to micro thermal devices are demonstrated.

• Journal of Korean Vacuum Science & Technology
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• v.3 no.1
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• pp.24-29
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• 1999

The characteristic behaviors of CH3Br were examined first for the dry etching of polysilicon in a Cl2/CH3Br/O2 plasma. CH3Br is revealed one of the excellent additive gases to control anisotropy of etching profile and to give no undercutting for various typed of polysilicons. CH3Br acts as a passivation precursor on the side wall in etch cavity by forming polymer-like films such as CHxBry(x+y=1,2). The decrease of etch selectivity due to the reaction if the C-containing species from CH3Br with the surface O atoms of SiO2 was overcome by the addition of O2 into plasma, resulting that the selectivity increased by 2~3 times. According to the results of optical emission signals, CH3Br should be dissociated into several fragments to give more hydrogen atoms than bromine atoms in our helical resonator system.

• Journal of the Korean Society for Precision Engineering
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• v.18 no.5
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• pp.50-56
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• 2001

Fabrication methods are shown to produce slender and cylindrical tungsten shafts by electrochemical etching. The shape of microshatf formed by electrochemical etching is determined by the combination of two conflicting factors, i.e., initial shape and diffusion layer. We can obtain a desirable shaft profile by adjusting the thickness gradient of diffusion layer. The diameter of microshaft is controlled by mathematical model based on relation between process parameters and diameter.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2002.11a
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• pp.130-136
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• 2002

Device makers want to make higher density chips as devices shrink, especially WSix poly stack down is one of the key issues. However, EPD (End Point Detection) time delay was happened in DPS+ poly chamber which is a barrier to achieve device shrink because EPD time delay killed test pattern and next generation device. To investigate the EPD time delay, a test was done with patterned wafers. This experimental was carried out combined with OES(Optical Emission Spectroscopy) and SEM (Scanning Electron Microscopy). OES was used to find corrected wavelength in WSix stack down gate etching. SEM was used to confirm WSix gate profile and gate oxide damage. Through the experiment, a new wavelength (252nm) line of plasma is selected for DPS+ chamber to call correct EPD in WSix stack down gate etching for current device and next generation device.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.396-401
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• 1999

In this study, $Ar^+$ ion laser etching process of single/poly-crystalline Si with $CCl_2F_2$ gas is investigated for MEMS applications. In general, laser direct etching process is useful in microelectronic process, fabrication of micro sensors and actuators, rapid prototyping, and complementary processing because of the advantages of 3D micromachining, local etching/deposition process, and maskless process with high resolution. In this study, a pyrolytic method, in which $CCl_2F_2$ gasetches molten Si by the focused laser, was used. In order to analyze the temperature profile of Si by the focused laser, the 3D heat conduction equation was analytically solved. In order to investigate the process parameters dependence of etching characteristics, laser power, $CCl_2F_2$ gas pressure, and scanning speed were varied and the experimental results were observed by SEM. The aspect ratio was measured in multiple scanning and the simple 3D structure was fabricated. In addition, the etching characteristics of $6\mum$ thick poly-crystalline Si on the insulator was investigated to obtain flat bottom and vertical side wall for MEMS applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.74-74
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• 2009

The ArF PR mask was. developed to overcome the limit. of sub 40nm patterning technology with KrF PR. But ArF PR difficult to meet the required PR selectivity by thin PR thickness. So need to the multi-stack mask such as amorphous carbon layer (ACL). Generally capacitively coupled plasma (CCP) etcher difficult to make the high density plasma and inductively coupled plasma (ICP) type etcher is more suitable for multi stack mask etching. Hybrid Coupled Plasma source (HCPs) etcher using the 13.56MHz RF power for ICP source and 2MHz and 27.12MHz for bias power was adopted to improve the process capability and controllability of ion density and energy independently. In the study, the oxide trench which has the multi stack layer process was investigated with the HCPs etcher (iGeminus-600 model DMS Corporation). The results were analyzed by scanning electron microscope (SEM) and it was found that etching characteristic of oxide trench profile depend on the multi-stack mask.