• 제목/요약/키워드: Etch-uniformity

검색결과 81건 처리시간 0.028초

dual frequency ICP 에서의 frequency 조합과 capacitance 변화에 따른 $SiO_2$ 및 poly-Si 식각특성

  • 김진호;김희대;이내응;허승회;장기명;남창길;손종원
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2007년도 춘계학술발표회 초록집
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    • pp.132-133
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    • 2007
  • 2개의 주파수가 인가된 유도결합 플라즈마(ICP)를 이용하여 주파수 조합(13.56 or 27.12/2MHz)과 안테나의 캐패시턴스 변화에 따른 $SiO_2$ 와 poly-Si 의 식각특성을 연구하였다. 본 실험의 결과로, 27.12 MHz에서 plasma density가 높다는 것과 13.56 MHz에서 center high profile이 쉽게 형성됨을 알 수 있었다. $SiO_2$ 식각에서는 non-uniformity와 etch rate모두 27.12 MHz가 13.56 MHz보다 높다는 것을 알 수 있었고, poly-Si 식각에서는 non-uniformity와 etch rate모두 비슷한 경향을 나타낸다는 것을 알 수 있었다.

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자장강화된 유도결합형 플라즈마를 이용한 산화막 식각에 대한 연구 (A study on the oxide etching using multi-dipole type magnetically enhanced inductively coupled plasmas)

  • 안경준;김현수;우형철;유지범;염근영
    • 한국진공학회지
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    • 제7권4호
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    • pp.403-409
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    • 1998
  • 본 연구에서는 자장강화된 유도결합형 플라즈마를 사용하여 이 플라즈마의 특성을 조사하고 또한 산화막 식각에 미치는 영향에 대하여 조사하였다. 자장 강화를 위해 4쌍의 영구자석이 사용되었고, 산화막 식각을 위해 $C_2F_6, CHF_3, C_4F_8$ 가스 및 이들 혼합가스가 사 용되었으며 첨가가스로 $H_2$를 사용하였다. 자장강화된 유도결합형 플라즈마 특성 분석을 위 해 Langmuir probe와 optical emission spectrometer를 이용하여 산화막 식각 속도 및 photoresist에 대한 식각 선택비를 stylus profilometer를 이용하여 측정하였다. 이온 밀도에 있어서 자장 유무에 따른 큰 변화는 관찰되지 않았으나 이온전류밀도의 균일도는 자장을 가 한 경우 웨이퍼가 놓이는 기판 부분에서 상당히 증가된 것을 알 수 있었다. 또한 자장이 가 해진 경우, 자장을 가하지 않은 경우에 비해 플라즈마 전위가 감소된 반면 전자온도 및 라 디칼 밀도는 크게 증가되는 것을 알 수 있었으며 산화막 식각시에도 높은 식각 속도와 식각 균일도를 보였다. 산화막 식각을 위해 수소가스를 사용한 가스조합중에서 C4F8/H2가스조합 이 가장 우수한 식각 속도 및 photoresist에 대한 식각 선택비를 나타내었으며 공정변수를 최적화 함으로써 순수 C4F8에서 4이상의 선택비와 함께 8000$\AA$/min의 가장 높은 식각속도 를 얻을 수 있었으며, 50%C4F8/50%H2에서 4000$\AA$/min의 산화막 식각 속도와 함께 15이상 의 식각 선택비를 얻을 수 있었다.

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HDP를 이용한 실리콘 단결정 Deep Dry Etching에 관한 특성 (Characterization of Deep Dry Etching of Silicon Single Crystal by HDP)

  • 박우정;김장현;김용탁;백형기;서수정;윤대호
    • 한국세라믹학회지
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    • 제39권6호
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    • pp.570-575
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    • 2002
  • 현재 전기 . 전자 기술의 추세는 소형화를 비롯하여 집적화, 저전력화, 저가격화의 장점을 가진 MEMS(Micro Electro Mechanical Systems) device의 개발에 주력하고 있으며, 이를 위해서는 고종횡비와 높은 식각 속도를 가진 HDP(High Density Plasma) etching 기술 개발이 필수적이라 할 수 있다. 이를 위하여 우리는 Inductively Coupled Plasma(ICP) 장비를 이용하여 각 공정 변수에 의한 실리콘 deep trench식각 반응을 연구하였다. 실험 공정 변수인 platen power, etch/passivation cycle time에서 etching 단계 시간에 따른 변화와 SF$_{6}$:C$_4$F$_{8}$ 가스유량을 변화시켜 연구하였으며 또한 이들의 profile, scallops, 식각 속도, 균일도, 선택비도 관찰하였다.

A Reproducible High Etch Rate ICP Process for Etching of Via-Hole Grounds in 200μm Thick GaAs MMICs

  • Rawal, D.S.;Agarwal, Vanita R.;Sharma, H.S.;Sehgal, B.K.;Muralidharan, R.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권3호
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    • pp.244-250
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    • 2008
  • An inductively coupled plasma etching process to replace an existing slower rate reactive ion etching process for $60{\mu}m$ diameter via-holes using Cl2/BCl3 gases has been investigated. Process pressure and platen power were varied at a constant ICP coil power to reproduce the RIE etched $200{\mu}m$ deep via profile, at high etch rate. Desired etch profile was obtained at 40 m Torr pressure, 950 W coil power, 90W platen power with an etch rate ${\sim}4{\mu}m$/min and via etch yield >90% over a 3-inch wafer, using $24{\mu}m$ thick photoresist mask. The etch uniformity and reproducibility obtained for the process were better than 4%. The metallized via-hole dc resistance measured was ${\sim}0.5{\Omega}$ and via inductance value measured was $\sim$83 pH.

유도 결합형 플라즈마를 이용한 감광제 제거 반응로의 설계 (Design of inductively couple dplasma ashing chamber)

  • 김철식;김철호;이현중;이용규;배경진;이종근;박세근
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 하계종합학술대회논문집
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    • pp.339-342
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    • 1998
  • Plasma etching of photoresist needs high etch rate, good uniformity and rae, good uniformity and low damage in low cost. ICP asher is expected to satisfy these requriement for next eneration semiconductor devices. ICPsimulator has been used to design the ashing chamber to redcue the development time and cost, and its results have been verified by QMS, OES and langmuir probe measurments. Plasma characteristics are monitored in terms of RF power and chamber pressure.

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Compact ECR plasma장치의 제작 및 특성 연구 (Study on the Fabrication and Characterization of Compact ECR Plasma System)

  • 윤민기;박원일;남기석;이기방
    • 전자공학회논문지A
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    • 제31A권4호
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    • pp.84-91
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    • 1994
  • A compact electron cyclotron resonance(ECR) plasma system composed of a microwave generator and a magnet coil was fabricated. A Langmuir single probe was used to investigate the plasma characteristics of the system through I-V measurements. The performance of the compact ECR plasma system was tested for the case of silicon etching reaction with $CF_{4}/O_{2}$(30%) mixed gas. Electron density and etch rate increased to maximum values and then decreased with increasing argon gas pressure, but electron temperature changed in the opposite way. The electron density and the electron temperature of argon gas plasma were 0.85${\times}~5.5{\times}10^{10}cm^{-3}$ and 4.5~6.0 eV, respectively, in the pressure range from $3{\times}10^{4}$ to 0.05Torr. The etch rate reached a maximum value at the position of 2.5cm from the bottom of plasma cavity. Etch rate uniformity was $\pm$6% across 6cm wafer. Anisotropic index was 0.75 at 1.5${\times}10^{-4}$Torr.

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CMP 연마를 통한 STI에서 결함 감소 (A Study of Chemical Mechanical Polishing on Shallow Trench Isolation to Reduce Defect)

  • 백명기;김상용;김창일;장의구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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    • pp.501-504
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    • 1999
  • In the shallow trench isolation(STI) chemical mechanical polishing(CMP) process, the key issues are the optimized thickness control within- wafer-non-uniformity, and the possible defects such as nitride residue and pad oxide damage. These defects after STI CMP process were discussed to accomplish its optimum process condition. To understand its optimum process condition, overall STI related processes including reverse moat etch, trench etch, STI filling and STI CMP were discussed. It is represented that the nitride residue can be occurred in the condition of high post CMP thickness and low trench depth. In addition there are remaining oxide on the moat surface after reverse moat etch. It means that reverse moat etching process can be the main source of nitride residue. Pad oxide damage can be caused by over-polishing and high trench depth.

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Quantitative Evaluation Method for Etch Sidewall Profile of Through-Silicon Vias (TSVs)

  • Son, Seung-Nam;Hong, Sang Jeen
    • ETRI Journal
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    • 제36권4호
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    • pp.617-624
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    • 2014
  • Through-silicon via (TSV) technology provides much of the benefits seen in advanced packaging, such as three-dimensional integrated circuits and 3D packaging, with shorter interconnection paths for homo- and heterogeneous device integration. In TSV, a destructive cross-sectional analysis of an image from a scanning electron microscope is the most frequently used method for quality control purposes. We propose a quantitative evaluation method for TSV etch profiles whereby we consider sidewall angle, curvature profile, undercut, and scallop. A weighted sum of the four evaluated parameters, nominally total score (TS), is suggested for the numerical evaluation of an individual TSV profile. Uniformity, defined by the ratio of the standard deviation and average of the parameters that comprise TS, is suggested for the evaluation of wafer-to-wafer variation in volume manufacturing.

Characterization of Gas Phase Etching Process of SiO2 with HF/NH3

  • Kim, Donghee;Park, Heejun;Park, Sohyeon;Lee, Siwon;Kim, Yejin;Hong, Sang Jeen
    • 반도체디스플레이기술학회지
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    • 제21권2호
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    • pp.45-50
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    • 2022
  • The etching with high selectivity of silicon dioxide over silicon nitride is essential in semiconductor fabrication, and gas phase etch (GPE) can increase the competitiveness of the selective dielectric etch. In this work, GPE of plasma enhanced chemical vapor deposited SiO2 was performed, and the effects of process parameters, such as temperature, partial pressure ratio, and gas supply cycle, are investigated in terms of etch rate and within wafer uniformity. Employing multiple regression analysis, the importance of each parameter elements is analyzed.

Etch Characteristics of $SiO_2$ by using Pulse-Time Modulation in the Dual-Frequency Capacitive Coupled Plasma

  • 전민환;강세구;박종윤;염근영
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.472-472
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    • 2011
  • The capacitive coupled plasma (CCP) has been extensively used in the semiconductor industry because it has not only good uniformity, but also low electron temperature. But CCP source has some problems, such as difficulty in varying the ion bombardment energy separately, low plasma density, and high processing pressure, etc. In this reason, dual frequency CCP has been investigated with a separate substrate biasing to control the plasma parameters and to obtain high etch rate with high etch selectivity. Especially, in this study, we studied on the etching of $SiO_2$ by using the pulse-time modulation in the dual-frequency CCP source composed of 60 MHz/ 2 MHz rf power. By using the combination of high /low rf powers, the differences in the gas dissociation, plasma density, and etch characteristics were investigated. Also, as the size of the semiconductor device is decreased to nano-scale, the etching of contact hole which has nano-scale higher aspect ratio is required. For the nano-scale contact hole etching by using continuous plasma, several etch problems such as bowing, sidewall taper, twist, mask faceting, erosion, distortions etc. occurs. To resolve these problems, etching in low process pressure, more sidewall passivation by using fluorocarbon-based plasma with high carbon ratio, low temperature processing, charge effect breaking, power modulation are needed. Therefore, in this study, to resolve these problems, we used the pulse-time modulated dual-frequency CCP system. Pulse plasma is generated by periodical turning the RF power On and Off state. We measured the etch rate, etch selectivity and etch profile by using a step profilometer and SEM. Also the X-ray photoelectron spectroscopic analysis on the surfaces etched by different duty ratio conditions correlate with the results above.

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