• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.135-136
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• 2008

이 실험에서는 비휘발성 메모리에서의 블로킹 층으로 $SiN_x$ 박막을 사용하였다. ELA (poly-Si) 기판위에 $SiO_xN_y$ 박막을 성장하기 전에 BHF를 이용해 자연 산화막을 제거하였다. 터널 층을 위해 2.7nm두께의 $SiO_xN_y$를 ICP-CVD 장비를 이용해 유리기판위에 증착하였다. 다음으로 $SiH_4/H_2$기체를 이용， ICP-CVD장비를 이용해 전하 저장을 위한 a-Si 박막을 증착하고, 마지막으로 a-Si층 위에 $SiN_x$ 층을 형성하였다. $SiN_x$ 박막을 형성하는데 최적의 조건을 찾기 위해 가스의 구성 비율 및 증착시간을 변화시키고 온도와 RF power도 바꿔주었다. 굴절률이 1.79 고 두께가 30 nm 인 $SiN_x$는 블로킹 층으로 사용하기 위한 것이다. 제작된 NSO-NVM 소자의 전기적 메모리 특성은 on current가 약 $10^{-5}$ A 이고 off current가 약 $5\times10^{-13}$ A로 전류 점멸비$(I_{ON}/I_{OFF})$는 약 $1\times10^7$ 이고 Swing 값은 0.53V/decade 이다. 1ms 동안의 programming/erasing 결과 약 3.5 V의 넓은 메모리 윈도우 크기를 가진다는 것을 확인할 수 있다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.11-20
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• 2008

The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.

• Special Issue of the Society of Naval Architects of Korea
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• 2013.12a
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• pp.21-29
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• 2013

For the purpose of supporting Curved Blocks, pipe welding is commonly used on Curved panel. Typically, when it comes to attaching supporting pipe on heavy incurvated surface, it makes much loss in the process of design, cutting, welding. This paper gives proper methods to collecting problems and Core conflicts surrounding Support Pipe by using of TOC (Theory Of Constraints). Therefore drawing two solutions, pipe development program and NC generating from pipe development Data for Plate Cutting machine. It describes a process of erasing loss surrounding Support Pipe with "TOC Thinking process" and development of two programs in this paper.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.12
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• pp.2189-2195
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• 2007

In this paper, we propose a newly developed selective reset waveform of a ac PDP using the wide erase pulse technique with the control of address bias voltage. Although it is generally understood that the wide pulse erasing methode shows the narrow driving margin in an opposite discharge type ac PDP, we could obtain a moderate driving margin in a 3-electrode surface discharge type ac PDP. The obtained driving margin shows a strong dependency on the sustain voltage and the address bias voltage. The lower the sustain and the address bias voltage, the wider the driving margin. The pulse width of the proposed waveform is only $10{\mu}s$, which gives additional time to the sustain period, hence increases the brightness. The brightness and contrast ratio increase about 20% together comparing to the conventional ramp type selective reset waveform with the driving scheme of 10 subfield ADS method. The driving margin was measured with the line by line addressed pattern on the white test panel of 2inch diagonal size and the discharge gas was Ne+Xe4%, 400torr.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.226-226
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• 2010

Boron Nitride (BN) doped GeSbTe films were grown by the ion beam sputtering deposition (IBSD). The in-situ sheet resistance data and the x-ray diffraction patterns showed the crystallization is suppressed due to the BN incorporation. The phase change speed in BN doped GeSbTe films were investigated using the static tester equipped with nanosecond pulsed laser. The phase change speed for BN doped GST films become faster than the corresponding values for an undoped GST film. The Johnson-Mehl-Avrami(JMA) plot and Avrami coefficient for laser crystallization showed that the change in growth mode during the laser crystallization is a most important factor for the phase change speed in the BN doped GST films. The JMA results and the atomic force microscopy (AFM) images indicate that the origin of the change in the crystalline growth mode is due to an increase in the number of initial nucleation sites which is produced by the incorporated BN. In addition, the retension properties for the laser writing/erasing are remarkably improved in BN doped GeSbTe films owing to the stability of the incorporated BN.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.202-202
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• 2010

최근 반도체 소자의 미세화에 따라, 단채널 효과에 의한 누설전류 및 소비전력증가 등이 문제가 되고 있다. DRAM의 경우, 캐패시터 영역의 축소문제가 소자집적화를 방해하는 요소로 작용하고 있다. 1T-DRAM은 기존의 DRAM과 달리 캐패시터 영역을 없애고 상부실리콘의 중성영역에 전하를 저장함으로써 소자집적화에 구조적인 이점을 갖는다. 또한 silicon-on-insulator (SOI) 기판을 이용할 경우, 뛰어난 전기적 절연 특성과 기생 정전용량의 감소, 소자의 저전력화를 실현할 수 있다. 본 연구에서는 silicon-germanium-on-insulator (SGOI) 기판을 이용한 1T-DRAM의 열처리온도에 따른 특성 변화를 평가하였다. 기존의 SOI 기판을 이용한 1T-DRAM과 달리, SGOI 기판을 사용할 경우, strained-Si 층과 relaxed-SiGe 층간의 격자상수 차에 의한 캐리어 이동도의 증가효과를 기대할 수 있다. 하지만 열처리 시, SiGe층의 Ge 확산으로 인해 상부실리콘 및 SiGe 층의 두께를 변화시켜, 소자의 특성에 영향을 줄 수 있다. 열처리는 급속 열처리 공정을 통해 $850^{\circ}C$와 $1000^{\circ}C$로 나누어 30초 동안 N2/O2 분위기에서 진행하였다. 그리고 Programming/Erasing (P/E)에 따라 달라지는 전류의 차를 감지하여 제작된 1T-DRAM의 메모리 특성을 평가하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.80-83
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• 2003

In this paper, the programming characteristics of the multi-bit devices based on SONOS structure are investigated. Our devices have been fabricated by $0.35\;{\mu}m$ complementary metal-oxide-semiconductor (CMOS) process with LOCOS isolation. In order to achieve the two-bits per cell operation, charges must be locally trapped in the nitride layer above the channel near the junction. Channel hot electron (CHE) injection for programming can operate in multi-bit using localized trap in nitride film. CHE injection in our devices is achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The multi-bit operation which stores two-bit per cell is investigated with a reverse read scheme. Also, hot hole injection for fast erasing is used. Due to the ultra-thin gate dielectrics, our results show many advantages which are simpler process, better scalability and lower programming voltage compared to any other two-bit storage flash memory. This fabricated structure and programming characteristics are shown to be the most promising for the multi-bit flash memory.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.143-146
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• 1996

In (GeTe)$_{100-x}$(Sb$_2$Te$_3$)$_{x}$(x=33.5, 50, 66.5, 80 at.%) thin films, the optical properties of amorphous and crystalline thin film, XRD were studied. Also, the application for the phase change optical recording materials with the high stability and rapid erasing ability were studied. In the (GeTe)$_{100-x}$(Sb$_2$Te$_{3}$)$_{x}$ the transmittance was decreased with the increase of x. In all thin films, the transmittance was decreased and the reflectance was increased by annealing and particularly, the reflectance before and after annealing showed the large reflectance ratio. The XRD pattern, it was confined that these change of optical properties was due to the crystallization of amorphous thin films. The reflectance change was investigated using isothermal annealing condition.ion.ion.

• The Journal of the Korea Contents Association
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• v.3 no.4
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• pp.23-28
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• 2003

This paper describes, in order to extract contour from topographic map image, an adaptive segment-length thresholding using a threshold depended on target image. First of all, after recognizing the primary symbols and detecting two edges from the projection histogram of the elevation value area, the threshold value is determined by the distance between the edges. Then, the subdivision is peformed by searching a branch point and erasing its neighboring Hack pixels. And contour components are extracted by segment-length thresholding. The experimental result shows that the final image contains non-contour component of 2.41% and contour one of 97.59%.

• Korean Institute of Interior Design Journal
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• v.15 no.6 s.59
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• pp.111-119
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• 2006

The spatial property of contemporary library is now rapidly changing through the spatial expansion of knowledge and information, the reduction of information storing facility, the variation of approaching methods by digital shift and the transition of social recognition as a cultural facility. Also the spatial characteristics with referring characters have developed such as, decentralization, de-construction, de-boundary, individual space, erasing of boundary, flow of space which extends infinitely. The main process of library origination, the systematic classification, and the storage system concluding with the demand and value of the information by changing social demands and the role of the widest ranged facility. And 5 themes, such as, hierarchy, center, storage, boundary, and symbol, as a changed spatial concept and analyzed in the case of library plans and libraries which are actually built. The significant purpose of this research is to propose that rhizomatous intellectuality and hypertext could be a theoretical background of the contemporary architecture and could be a viewpoint of the transition of spatial structure in libraries. A future library should have spatial property embracing various social changes and needs and for this respect, it is necessary to approach and analyze through the architectural explication from diverging points of view.