• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.5
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• pp.1580-1584
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• 2010

In this paper, we made an analysis of the effective optical pulse stream generation. This is different from conventional approaches, which use fiber or waveguide delay line circuits. The optical pulse multiplication phenomenon occurs when the optical pulse's spectral width is greater than the transfer bandwidth of the coupler used. Therefore, the effective optical pulse stream generation can be controlled by using fiber couplers with different equivalent transfer bandwidths. The pulse separation spacing is controlled by number of cascaded coupler in optical loop mirror coupler scheme.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.443-450
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• 2014

This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.11
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• pp.1176-1183
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• 2003

In this paper, miniature voltage-controlled oscillator(VCO) for 1.6 ㎓ PCS band is designed and implemented using the LTCC technique. Circuit level design using commercial components is performed, and passive L, C elements embedded in LTCC substrate is optimized by simulation tools. Embedded passive components are modeled into equivalent circuits and their circuit parameters are extracted for circuit simulation. Utilizing the designed embedded passive elements and 21 layers LTCC substrate, VCO with 4.0${\times}$4.0${\times}$1.6 ㎣ dimensions is designed and fabricated. Developed VCO operates in 2.7 V with 8.5 ㎃ current consumption. The phase noise performance of VCO is below -112.61 ㏈c/㎐ at 100 ㎑ offset and harmonic suppression characteristics is measured above -30 ㏈.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.11
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• pp.790-800
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• 2013

The optimal structure of 1-3 piezocomposites has been determined by controlling polymer properties, ceramic volume fraction, thickness of composite and aspect ratio of the composite to maximize the TVR (transmitting voltage response), RVS (receiving voltage sensitivity) and FBW (fractional bandwidth) of underwater acoustic transducers. Influence of the design variables on the transducer performance was analyzed with equivalent circuits and the finite element method. When the piezocomposite is vibrating in a pure thickness mode, inter-pillar resonant modes are likely to occur between lattice-structured piezoceramic pillars and polymer matrix, which significantly deteriorate the performance of the piezocomposite. In this work, a new method to design the structure of the 1~3 type piezocomposite was proposed to maximize the TVR, RVS and FBW while preventing the occurrence of the inter-pillar modes. Genetic algorithm was used in the optimal design.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.4
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• pp.186-191
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• 2012

DC Bus Electrolytic capacitors have been widely used in power conversion system because they can achieve high capacitance and voltage ratings with volumetric efficiency and low cost. This type of capacitors have been traditionally used for filtering, voltage smoothing, by-pass and other many applications in power conversion circuits requiring a cost effective and volumetric efficiency components. Unfortunately, electrolytic capacitors are some of the weakest components in power electronic converter. Many papers have proposed different methods or algorithms to determinate the ESR and/or capacitance C for fault diagnosis of the electrolytic capacitor. However, both ESR and C vary with frequency and temperature. Accurate knowledge of both values at the capacitors operating conditions is essential to achieve the best reference data of fault judgement. According to parameter analysis, the capacitance increases with temperature and the ESR decreases. Higher frequencies make the ESR and C to decrease. Analysis results show that the proposed electrolytic capacitor parameter estimation technique can be applied to reference signal of capacitor diagnosis systems successfully.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.2
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• pp.119-125
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• 2011

A novel circuit structure of dual-band bandstop filters is proposed in this paper. This structure comprises two shunt-connected tri-section stepped impedance resonators with a transmission line in between. Theoretical analysis from the equivalent circuit and design procedures are described. We represented graphs for filter design from the derived synthesis equations by resonance condition of circuits. Notably, advantages of the proposed filter structure are compact size in design, wide range of realizable resonance frequency ratio, and more realizable impedances.

• Journal of Power Electronics
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• v.6 no.1
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• pp.73-82
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• 2006

Plasma display panels (PDPs) have a serious thermal problem, because the luminance efficiency of a conventional PDP is about 1.5 1m/W and it is less than $3\~5\;lm/W$ of a cathode ray tube (CRT). Thus there is a need for improving the luminance efficiency of the PDP. There are several approaches to improve the luminance efficiency of the PDP and we adopted a driving PDP at high frequency range from 400kHz up to over 700kHz. Since a PDP is regarded as an equivalent inherent capacitance, many types of sustaining drivers have been proposed and widely used to recover the energy stored in the PDP. However, these circuits have some drawbacks for driving PDPs at high frequency ranges. In this paper, we investigate the effect of the parasitic components on the PDP itself and on the driver when the reactive energy of the panel is recovered. Various drivers are classified and evaluated based on their suitability for high frequency drivers. Finally, a current-fed driver with a DC input voltage bias is proposed. This driver overcomes the effect of parasitic components in the panel and driver. It fully achieves a ZVS of all full-bridge switches and reduces the transition time of the panel polarity. It is tested to validate the high frequency sustaining driver and the experimental results are presented.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.380-384
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• 2005

Plasma display panel (PDP) has a serious thermal problem, because the luminance efficiency of the conventional PDP is about 1.5 lm/W and it is less than $3{\sim}5$ lm/W of cathode ray tube (CRT). Thus there is a need for improving the luminance efficiency of the PDP There are several approaches to improve the luminance efficiency of the PDP and we adopt the driving PDP at high frequency range from 400 kHz up to over 700 kHz. Since a PDP is regarded as an equivalent inherent capacitance, many types of sustaining drivers have been proposed and widely used to recover the energy stored in the PDP. However, these circuits have some drawbacks for driving PDP at high frequency range. In this paper, we investigate the effect of the parasitic components of PDP itself and driver when the reactive energy of panel is recovered. Various drivers are classified and evaluated whether it is suitable for high frequency driver, and finally current-fed type with do input voltage biased is proposed. This driver overcomes the effect of parasitic component in panel and driver and fully achieves ZVS of all full-bridge switches and reduces the transition time of the panel polarity.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.3
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• pp.381-387
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• 1994

In this paper, we found the improved SPICE heat transfer modeling of impulsed magnetizing fixture system and investigated temperature characteristics using the proposed model. As the detailed thermal characteristics of magnetizing fixture can be obtained, the efficient design of the impulsed magnetizing fixture which produce desired magnet will be possible using our heat transfer modeling. The knowledge of the temperature of the magnetizing fixture is very important of forecast the characteristics of the magnetizing fixture which produce desired magnet will be possible using our heat transfer modeling. The knowledge of the temperature of the magnetizing fixture is very important to forecast the characteristics of the magnetizing circuits under different conditions. The capacitor voltage was not raised above 810[V] to protect the magnetizing fixture from excessive heating. The purpose of this work is to compute the temperature increasing for different magnetizing conditions. The method uses multi-lumped model with equivalent thermal resistance and thermal capacitance. The reliable results are obtained by using iron core fixture (stator magnet of air cleaner DC motor) coupled to a low-voltage magnetizer(charging voltage : 1000[V], capacitor : 3825[$\mu$F]. The modeling and experimental results are in close aggrement.

• Current Optics and Photonics
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• v.1 no.5
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• pp.529-537
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• 2017

We explored how changes in blood vessel compliance affected the systolic rise time (SRT) of the maximum blood pressure (BP) peak wave and the diastolic fall time (DFT) of the minimal BP peak wave, compared to photoplethysmograpic (PPG) parameters, using a two-compartment, second-order, arterial Windkessel model. We employed earlier two-compartment Windkessel models and the components thereof to construct equivalent blood vessel circuits, and reproduced BP waveforms using PSpice technology. The SRT and DFT values were obtained via circuit simulation, considering variations in compliance (the dominant influence on blood vessel parameters attributable to BP changes). And then performed regression analysis to identify how compliance affected the SRT and DFT. We compared the SRTs and DFTs of BP waves to the PPG values by reference to BP changes in each subject. We confirmed that the time-shift propensities of BP waves and the PPG data were highly consistent. However, the time shifts differed significantly among subjects. These simulation and experimental results allowed us to construct an initial trend curve of individual BP peak time (measured via wrist PPG evaluations at three arm positions) that facilitated accurate individual BP estimations.