• Title/Summary/Keyword: Epi layer

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DC Characteristices of GaAs MESFET with Different Physical Structures (구조적 변화에 따른 GaAs MESFET 제작 및 DC 특성)

  • 김인호;원창섭;안형근;한득영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.82-85
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    • 2000
  • The less sensitive structure to the surface effect has been presented utiliting an undoped GaAs layer on the n-GaAs channel. The undoped layer has been found to be effective to supress the frequency dispersion phenomena caused by a surface trapping effect and to raise the MESFET's performance. The gate structure, with an undoped layer underneath the gate metal has been found to be effective to improve the breakdown voltage. GaAs MESFETS with different physical structures are fabricated and DC characteristics are measued. GaAs MESFET's are fabricated on epi-wafers which have an undoped GaAs layer in between n+ and n GaAs layers grown by MBE.

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Magnetic Sensitivity Improvement of Silicon Vertical Hall Device (Si 종형 Hall 소자의 자기감도 개선)

  • Ryu, Ji-Goo;Kim, Nam-Ho;Chung, Su-Tae
    • Journal of Sensor Science and Technology
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    • v.20 no.4
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    • pp.260-265
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    • 2011
  • The silicon vertical hall devices are fabricated using a modified bipolar process. It consists of the thin p-layer at Si-$SiO_2$, interface and n-epi layer without $n^+$buried layer to improve the sensitivity and influence of interface effects. Experimental samples are a sensor type I with and type H without p+isolation dam adjacent to the center current electrode. The experimental results for both type show a more high current-related sensitivity than the former's vertical hall devices. The sensitivity of type H and type I are about 150 V/AT and 340 V/AT, respectively. This sensor's behavior can be explained by the similar J-FET model.

Transparent Conducting Zinc-Tin-Oxide Layer for Application to Blue Light Emitting-diode

  • Kim, Do-Hyeon;Kim, Gi-Yong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.346.2-346.2
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    • 2014
  • To use the GaN based light-emitting diodes (LEDs) as solid state lighting sources, the improvement of light extraction and internal quantum efficiency is essential factors for high brightness LEDs. In this study, we suggested the new materials system of a zinc tin oxide (ZTO) layer formed on blue LED epi-structures to improve the light extraction. ZTO is a representative n-type oxide material consisted of ZnO and SnO system. Moreover, ZTO is one of the promising oxide semiconductor material. Even though ZTO has higher chemical stability than IGZO owing to its SnO2 content this has high mobility and high reliability. After formation of ZTO layer on p-GaN layer by using the spin coating method, structural and optical properties are investigated. The x-ray diffraction (XRD) measurement results show the successful formation of ZTO. The photoluminescence (PL) and absorption spectrum shows that it has 3.6-4.1eV band gap. Finally, the light extraction properties of ZTO/LED chip using electroluminescence (EL) measurement were investigated. The experimental and theoretical analyses were simultaneously conducted.

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Silicidation of the Co/Ti Bilayer on the Doped Polycrystalline Si Substrate (다결정 Si기판 위에서의 Co/Ti 이중층의 실리사이드화)

  • Kwon, Young-Jae;Lee, Jong-Mu;Bae, Dae-Lok;Kang, Ho-Kyu
    • Korean Journal of Materials Research
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    • v.8 no.7
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    • pp.579-583
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    • 1998
  • Silicide layer structures, agglomeration of silicide layers, and dopant redistributions for the Co/Ti bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The $CoSi_2$ phase transition temperature is higher and agglomeration of the silicide layer occurs more severely for the Co/Ti bilayer on the doped polycrystalline Si substrate than on the single Si substrate. Also, dopant loss by outdiffusion is much more significant on the doped polycrystalline Si substrate than on the single Si substrate. All of these differences are attributed to the grain boundary diffusion and heavier doping concentration in the polycrystalline Si. The layer structure after silicidation annealing of Co/ Tildoped - polycrystalline Si is polycrystalline CoSi,/polycrystalline Si, while that of Co/TiI( 100) Si is Co- Ti- Si/epi- CoSi,/(lOO) Si.

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Magnetic Sensitivity Improvement of 2-Dimensional Silicon Vertical Hall Device (2 차원 Si 종형 Hall 소자의 자기감도 개선)

  • Ryu, Ji-Goo
    • Journal of Sensor Science and Technology
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    • v.23 no.6
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    • pp.392-396
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    • 2014
  • The 2-dimensional silicon vertical Hall devices, which are sensitive to X,Y components of the magnetic field parallel to the surface of the chip, are fabricated using a modified bipolar process. It consists of the thin p-layer at Si-$SiO_2$ interface and n-epi layer to improve the sensitivity and influence of interface effect. Experimental samples are a sensor type K with and type J without $p^+$ isolation dam adjacent to the center current electrode. The results for both type show a more high sensitivity than the former's 2-dimensional vertical Hall devices and a good linearity. The measured non-linearity is about 0.8%. The sensitivity of type J and type K are about 66 V/AT and 200 V/AT, respectively. This sensor's behavior can be explained by the similar J-FET model.

Electrical Characteristics of Super Junction MOSFET According to Trench Etch Angle of P-pillar (P-pillar 식각 각도에 따른 Super Junction MOSFET의 전기적 특성 분석에 관한 연구)

  • Kang, Ey Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.8
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    • pp.497-500
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    • 2014
  • In this paper, we analyze electrical characteristics of n/p-pillar layer according to trench angle which is the most important characteristics of SJ MOSFET and core process. Because research target is 600 V class SJ MOSFET, so conclusively trench angle deduced 89.5 degree to implement the breakdown voltage 750 V with 30% margin rate. we found that on resistance is $22mohm{\cdot}cm^2$ and threshold voltage is 3.5 V. Moreover, depletion layer of electric field distribution also uniformly distributes.

Characterization of epitaxial layers on beta-gallium oxide single crystals grown by EFG method as a function of different crystal faces and off-angle (EFG 법으로 성장시킨 β-Ga2O3 단결정의 다양한 결정면, off-angle에 따른 epitaxial layer의 특성 분석)

  • Min-Ji Chae;Sun-Yeong Seo;Hui-Yeon Jang;So-Min Shin;Dae-Uk Kim;Yun-Jin Kim;Mi-Seon Park;Gwang-Hee Jung;Jin-Ki Kang;Hae-Yong Lee;Won-Jae Lee
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.34 no.4
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    • pp.109-116
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    • 2024
  • β-Ga2O3 is a representative ultra-wide bandgap (UWBG) semiconductor that has attracted much attention for power device applications due to its wide-bandgap of 4.9 eV and high-breakdown voltage of 8 MV/cm. In addition, because solution growth is possible, it has advantages such as fast growth rate and lower production cost compared to SiC and GaN [1-2]. In this study, we have successfully grown Si-doped 10 mm thick Si-doped β-Ga2O3 single crystals by the EFG (Edge-defined Film-fed Growth) method. The growth direction and growth principal plane were set to [010] / (010), respectively, and the growth speed was 7~20 mm/h. The as-grown β-Ga2O3 single crystal was cut into various crystal planes (001, 100, ${\bar{2}}01$) and off-angles (1o, 3o, 4o), and then surface processed. After processed, the homoepitaxial layer was grown on the epi-ready substrate using the HVPE (Halide vapor phase epitaxy) method. The processed samples and the epi-layer grown samples were analyzed by XRD, AFM, OM, and Etching to compare the surface properties according to the crystal plane and off-angle.

Selective Oxidation of Single Crystalline AlAs layer on GaAs substrate and XPS(X-ray photoelectron spectroscopy) Analysis (GaAs 기판위에 성장된 단결정 AlAs층의 선택적 산화 및 XPS (X-ray photonelectron spectroscopy) 분석)

  • Lee, Suk-Hun;Lee, Young-Soo;Tae, Heung-Sik;Lee, Young-Hyun;Lee, Jung-Hee
    • Journal of Sensor Science and Technology
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    • v.5 no.5
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    • pp.79-84
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    • 1996
  • A $1\;{\mu}m$ thick n-type GaAs layer with Si doping density of $1{\times}10^{17}/cm^{3}$ and a $500{\AA}$ thick undoped single crystalline AlAs layer were subsequently grown by molecular beam epitaxy on the $n^{+}$ GaAs substrate. The AlAs/GaAs layer was oxidized in $N_{2}$ bubbled $H_{2}O$ vapor($95^{\circ}C$) ambient at $400^{\circ}C$ for 2 and 3 hours. From the result of XPS analysis, small amounts of $As_{2}O_{3}$, AlAs, and elemental As were found in the samples oxidized up to 2 hours. After 3 hours oxidation, however, various oxides related to As were dissolved and As atoms were diffused out toward the oxide surface. The as-grown AlAs/GaAs layer was selectively converted to $Al_{2}O_{3}/GaAs$ at the oxidation temperature $400^{\circ}C$ for 3 hours. The oxidation temperature and time is very critical to stop the oxidation at the AlAs/GaAs interface and to form a defect-free surface layer.

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The Fabrication of ZnO UV Photodetector with p-type Inversion Layer and Analysis of Vrlph Properties (P형 반전층을 갖는 ZnO 자외선 수광소자의 제작과 Vrlph특성 분석)

  • Oh, Sang-Hyun;Kim, Deok-Kyu;Park, Choon-Bae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.10
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    • pp.883-888
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    • 2007
  • Investigation of improving the properties of UV detector which uses the wide bandgap of ZnO are under active progress. The present study focused on the design and fabrication of i-ZnO/p-inversion $layer/n^--Si$ Epi. which is characterized with very thin p-type inversion layer for UV detectors. The i-ZnO thin film for achieving p-inversion layer which was grown by RF sputtering at $450^{\circ}C$ and then annealed at $400^{\circ}C$ in $O_2$ gas for 20 min shows good intrinsic properties. High (0002) peak intensity of the i-ZnO film is shown on XRD spectrum and it is confirmed by XPS analysis that the ratio of Zn : O of the i-ZnO film is nearly 1 : 1. Measurement shows high transmission of 79.5 % in UV range (< 400 nm) for the i-ZnO film. Measurement of $V_r-I_{ph}$ shows high UV photo-current of 1.2 mA under the reverse bias of 30 V.

Fabrication and Characterization of AlGaAs/GaAs HBT (AlGaAs/GaAs HBT의 제작과 특성연구)

  • 박성호;최인훈;오응기;최성우;박문평;윤형섭;이해권;박철순;박형무
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.9
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    • pp.104-113
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    • 1994
  • We have fabricated n-p-n HBTs using 3-inchAlgaAs/GaAs hetero structure epi-wafers grown by MBE. DC and AC characteristics of HBT devices were measured and analyzed. For HBT epi-structure, Al composition of emitter was graded in the region between emitter cap and emitter. And base layer was designed with concentration of 1${\times}10^{19}/cm^{3}$ and thickness of 50nm, and Be was used as the p-type dopant. Principal processes for device fabrication consist of photolithography using i-line stepper, wet mesa etching, and lift-off of each ohmic metal. The PECVD SiN film was used as the inslator for the metal interconnection. HBT device with emitter size of 3${\times}10{\mu}m^{2}$ resulted in cut-off frequency of 35GHz, maximum oscillation frequency of 21GHz, and current gain of 60. The distribution of the ideality factor of collector and base current was very uniform, and the average values of off-set voltage and current was very uniform, and the average values of off-set voltage and current gain were 0.32V and 32 within a 3-inch wafer.

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