• Title/Summary/Keyword: Enhancement-mode

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Real Time Enhancement of Images Degraded by Bad Weather (악천후로 저하된 영상 화질의 실시간 개선)

  • Kim, Jaemin;Yeon, Sungho
    • Journal of Korea Multimedia Society
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    • v.17 no.2
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    • pp.143-151
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    • 2014
  • In images degraded by bad weather, edges representing object boundaries become weak and faint. In this paper we present an image enhancement method, which increases image visibility by making edges as clear as possible. First, we choose edge candidate regions by finding local maxima and minima in an image intensity field, and then build a histogram using image intensities of pixels located at the two sides of candidate edges. Second, we decompose this histogram into multiple modes, which are determined by local minima in the histogram. Once modes are computed, we find modes connected by edges in the image intensity field and build link chains of connected modes. Finally we choose the longest link chain of modes and make the distances between every connected modes as large as possible. The darkest mode and the brightest mode should be within the image intensity range. This stretch makes edges clear and increases image visibility. Experiments show that the proposed method real-time enhances images degraded by bad weather as good as well known time-consuming methods.

Fabrication and Characteristics of Zinc Oxide- and Gallium doped Zinc Oxide thin film transistor using Radio Frequency Magnetron sputtering at Room Temperature (Zinc Oxide와 갈륨이 도핑 된 Zinc Oxide를 이용하여 Radio Frequency Magnetron Sputtering 방법에 의해 상온에서 제작된 박막 트랜지스터의 특성 평가)

  • Jeon, Hoon-Ha;Verma, Ved Prakash;Noh, Kyoung-Seok;Kim, Do-Hyun;Choi, Won-Bong;Jeon, Min-Hyon
    • Journal of the Korean Vacuum Society
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    • v.16 no.5
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    • pp.359-365
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    • 2007
  • In this paper we present a bottom-gate type of zinc oxide (ZnO) and Gallium (Ga) doped zinc oxide (GZO) based thin film transistors (TFTs) through applying a radio frequency (RF) magnetron sputtering method at room temperature. The gate leakage current can be reduced up to several ph by applying $SiO_2$ thermally grown instead of using new gate oxide materials. The root mean square (RMS) values of the ZnO and GZO film surface were measured as 1.07 nm and 1.65 nm, respectively. Also, the transmittances of the ZnO and GZO film were more than 80% and 75%, respectively, and they were changed as their film thickness. The ZnO and GZO film had a wurtzite structure that was arranged well as a (002) orientation. The ZnO TFT had a threshold voltage of 2.5 V, a field effect mobility of $0.027\;cm^2/(V{\cdot}s)$, a on/off ratio of $10^4$, a gate voltage swing of 17 V/decade and it operated in a enhancement mode. In case of the GZO TFT, it operated in a depletion mode with a threshold voltage of -3.4 V, a field effect mobility of $0.023\;cm^2/(V{\cdot}s)$, a on/off ratio of $2{\times}10^4$ and a gate voltage swing of 3.3 V/decade. We successfully demonstrated that the TFTs with the enhancement and depletion mode type can be fabricated by using pure ZnO and 1wt% Ga-doped ZnO.

Mode II Fracture Toughness of Hybrid FRCs

  • Abou El-Mal, H.S.S.;Sherbini, A.S.;Sallam, H.E.M.
    • International Journal of Concrete Structures and Materials
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    • v.9 no.4
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    • pp.475-486
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    • 2015
  • Mode II fracture toughness ($K_{IIc}$) of fiber reinforced concrete (FRC) has been widely investigated under various patterns of test specimen geometries. Most of these studies were focused on single type fiber reinforced concrete. There is a lack in such studies for hybrid fiber reinforced concrete. In the current study, an experimental investigation of evaluating mode II fracture toughness ($K_{IIc}$) of hybrid fiber embedded in high strength concrete matrix has been reported. Three different types of fibers; namely steel (S), glass (G), and polypropylene (PP) fibers were mixed together in four hybridization patterns (S/G), (S/PP), (G/PP), (S/G/PP) with constant cumulative volume fraction ($V_f$) of 1.5 %. The concrete matrix properties were kept the same for all hybrid FRC patterns. In an attempt to estimate a fairly accepted value of fracture toughness $K_{IIc}$, four testing geometries and loading types are employed in this investigation. Three different ratios of notch depth to specimen width (a/w) 0.3, 0.4, and 0.5 were implemented in this study. Mode II fracture toughness of concrete $K_{IIc}$ was found to decrease with the increment of a/w ratio for all concretes and test geometries. Mode II fracture toughness $K_{IIc}$ was sensitive to the hybridization patterns of fiber. The (S/PP) hybridization pattern showed higher values than all other patterns, while the (S/G/PP) showed insignificant enhancement on mode II fracture toughness ($K_{IIc}$). The four point shear test set up reflected the lowest values of mode II fracture toughness $K_{IIc}$ of concrete. The non damage defect concept proved that, double edge notch prism test setup is the most reliable test to measure pure mode II of concrete.

Effects of CF4 Plasma Treatment on Characteristics of Enhancement Mode AlGaN/GaN High Electron Mobility Transistors

  • Horng, Ray-Hua;Yeh, Chih-Tung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.62-62
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    • 2015
  • In this study, we study the effects of CF4 plasma treatment on the characteristics of enhancement mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs). The CF4 plasma is generated by inductively coupled plasma reactive ion etching (ICP-RIE) system. The CF4 gas is decomposed into fluorine ions by ICP-RIE and then fluorine ions will effect the AlGaN/GaN interface to inhibit the electron transport of two dimension electron gas (2DEG) and increase channel resistance. The CF4 plasma method neither like the recessed type which have to utilize Cl2/BCl3 to etch semiconductor layer nor ion implantation needed high power to implant ions into semiconductor. Both of techniques will cause semiconductor damage. In the experiment, the CF4 treatment time are 0, 50, 100, 150, 200 and 250 seconds. It was found that the devices treated 100 seconds showed best electric performance. In order to prove fluorine ions existing and CF4 plasma treatment not etch epitaxial layer, the secondary ion mass spectrometer confirmed fluorine ions truly existing in the sample which treatment time 100 seconds. Moreover, transmission electron microscopy showed that the sample treated time 100 seconds did not have etch phenomena. Atomic layer deposition is used to grow Al2O3 with thickness 10, 20, 30 and 40 nm. In electrical measurement, the device that deposited 20-nm-thickness Al2O3 showed excellent current ability, the forward saturation current of 210 mA/mm, transconductance (gm) of 44.1 mS/mm and threshold voltage of 2.28 V, ION/IOFF reach to 108. As IV concerning the breakdown voltage measurement, all kinds of samples can reach to 1450 V.

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Accuracy Enhancement Technique in the Current-Attenuator Circuit (전류 감쇠 조정 회로에서의 정밀도 향상 기술)

  • Kim, Seong-Kweon
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.8
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    • pp.116-121
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    • 2005
  • To realize the tap coefficient of a finite impulse response(FIR) filter or the twiddle factor of a fast Fourier transform(FFT) using a current-mode analog circuit, a high accurate current-attenuator circuit is needed This paper introduces an accuracy enhancement technique in the current-mode signal processing. First of all, the DC of set-current error in a conventional current-attenuator using a gate-ratioed orient mirror circuit is analyzed and then, the current-attenuator circuit with a negligibly small DC offset-current error is introduced. The circuit consists of N-output current mirrors connected in parallel with me another. The output current of the circuit is attenuated to 1/N of the input current. On the basis of the Kirchhoff current law, the current scale ratio is determined simply by the number of the current mirrors in the N-current mirrors connected in parallel. In the proposed current-attenuator circuit the scale accuracy is limited by the ac gain error of the current mirror. Considering that a current mirror has a negligibly small ac gain error, the attainable maximum scale accuracy is theoretically -80[dB] to the input current.

An Efficient Mode Decision Method for Fast Intra Prediction of SVC (SVC에서 빠른 인트라 예측을 위한 효율적인 모드 결정 방법)

  • Cho, Mi-Sook;Kang, Jin-Mi;Chung, Ki-Dong
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.4
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    • pp.280-283
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    • 2009
  • To improve coding performance of scalable video coding which is an emerging video coding standard as an extension of H.264/AVC, SVC uses not only intra prediction and inter prediction but inter-layer prediction. This causes a problem that computational complexity is increased. In this paper, we propose an efficient intra prediction mode decision method in spatial enhancement layer to reduce the computational complexity. The proposed method selects Inra_BL mode using RD cost of Intra_BL in advance. After that, intra mode is decided by only comparing DC modes. Experimental results show that the proposed method reduces 59% of the computation complexity of intra prediction coding, while the degradation in video quality is negligible.

Phase Mode Decision Scheme for Fast Encoding in H.264 SVC (H.264/AVC 스케일러블 비디오 코딩에서 빠른 부호화를 위한 단계적 모드 선택 기법)

  • Goh, Gyeong-Eun;Kang, Jin-Mi;Cho, Mi-Sook;Chung, Ki-Dong
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.8
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    • pp.793-797
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    • 2008
  • To achieve flexible visual contents adaptation for multimedia communications, the ISO/IEC MPEG & ITU-T VCEG form the JVT to develop an SVC amendment for the H.264/AVC standard. JVT uses inter-layer prediction that can improve the rate-distortion efficiency of the enhancement layer. But inter-layer prediction causes computational complexity to be increased. In this paper, we propose a fast mode decision for inter frame coding. It makes use of the correlation between optimized prediction mode and its RD cost. Experimental results show that the proposed schemes save up to 38% of encoding time with a negligible coding loss and bit-rate increase.

Design and Evaluation of Cascode GaN FET for Switching Power Conversion Systems

  • Jung, Dong Yun;Park, Youngrak;Lee, Hyun Soo;Jun, Chi Hoon;Jang, Hyun Gyu;Park, Junbo;Kim, Minki;Ko, Sang Choon;Nam, Eun Soo
    • ETRI Journal
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    • v.39 no.1
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    • pp.62-68
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    • 2017
  • In this paper, we present the design and characterization analysis of a cascode GaN field-effect transistor (FET) for switching power conversion systems. To enable normally-off operation, a cascode GaN FET employs a low breakdown voltage (BV) enhancement-mode Si metal-oxide-semiconductor FET and a high-BV depletion-mode (D-mode) GaN FET. This paper demonstrates a normally-on D-mode GaN FET with high power density and high switching frequency, and presents a theoretical analysis of a hybrid cascode GaN FET design. A TO-254 packaged FET provides a drain current of 6.04 A at a drain voltage of 2 V, a BV of 520 V at a drain leakage current of $250{\mu}A$, and an on-resistance of $331m{\Omega}$. Finally, a boost converter is used to evaluate the performance of the cascode GaN FET in power conversion applications.

Position Control of Induction Motor Using the Sliding Mode PID Control Method (슬라이딩 모드 PID 제어법을 이용한 유도 전동기의 위치제어)

  • Lee, Yoon-Jong;Kim, Hee-Jun;Son, Young-Dae;Jang, Bong-Jae
    • Proceedings of the KIEE Conference
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    • 1990.07a
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    • pp.341-345
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    • 1990
  • This paper presents the three section sliding mode control algorithm based on hysteresis current control add indirect field oriented control method, and applies it to the position control of induction motor. The three section sliding trajectories are defined in such a way that the system responds following a max acceleration line, then a max speed line, and finally a max deceleration line. This control scheme solves the problem of robustness loss during the reaching phase that occurs in conventional VSC strategy, and ensures the stable sliding mode and robustness enhancement throughout an entire response. Also, the PID controller operating in parallel is adopted to eliminate the sliding mode's collapse phenomenon near the origin caused by steady state chattering phenomenon Digital simulation results confirm that the dynamic performance of the system is insensitive to parameter variations and disturbances.

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A High-Efficiency, Auto Mode-Hop, Variable-Voltage, Ripple Control Buck Converter

  • Rokhsat-Yazdi, Ehsan;Afzali-Kusha, Ali;Pedram, Massoud
    • Journal of Power Electronics
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    • v.10 no.2
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    • pp.115-124
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    • 2010
  • In this paper, a simple yet efficient auto mode-hop ripple control structure for buck converters with light load operation enhancement is proposed. The converter, which operates under a wide range of input and output voltages, makes use of a state-dependent hysteretic comparator. Depending on the output current, the converter automatically changes the operating mode. This improves the efficiency and reduces the output voltage ripple for a wide range of output currents for given input and output voltages. The sensitivity of the output voltage to the circuit elements is less than 14%, which is seven times lower than that for conventional converters. To assess the efficiency of the proposed converter, it is designed and implemented with commercially available components. The converter provides an output voltage in the range of 0.9V to 31V for load currents of up to 3A when the input voltage is in the range of 5V to 32V. Analytical design expressions which model the operation of the converter are also presented. This circuit can be implemented easily in a single chip with an external inductor and capacitor for both fixed and variable output voltage applications.