• Title/Summary/Keyword: Encoding Speed

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Modeling and Simulation of New Encoding Schemes for High-Speed UHF RFID Communication

  • Mo, Sang-Hyun;Bae, Ji-Hoon;Park, Chan-Won;Bang, Hyo-Chan;Park, Hyung Chul
    • ETRI Journal
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    • v.37 no.2
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    • pp.241-250
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    • 2015
  • In this paper, we present novel high-speed transmission schemes for high-speed ultra-high frequency (UHF) radio-frequency identification communication. For high-speed communication, tags communicate with a reader using a high-speed Miller (HS-Miller) encoding and multiple antennas, and a reader communicates with tags using extended pulse-interval encoding (E-PIE). E-PIE can provide up to a two-fold faster data rate than conventional pulse-interval encoding. Using HS-Miller encoding and orthogonal multiplexing techniques, tags can achieve a two- to three-fold faster data rate than Miller encoding without degrading the demodulation performance at a reader. To verify the proposed transmission scheme, the MATLAB/Simulink model for high-speed backscatter based on an HS-Miller modulated subcarrier has been designed and simulated. The simulation results show that the proposed transmission scheme can achieve more than a 3 dB higher BER performance in comparison to a Miller modulated subcarrier.

A Study on a Compensation of Decoded Video Quality and an Enhancement of Encoding Speed

  • Sir, Jaechul;Yoon, Sungkyu;Lim, Younghwan
    • Journal of the Korea Computer Graphics Society
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    • v.6 no.3
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    • pp.35-40
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    • 2000
  • There are two problems in H.26X compression technique. One is compressing time in encoding process and the other is degradation of the decoded video quality due to high compression rate. For transferring moving pictures in real-time, it is required to adopt massively high compression. In this case, there are a lot of losses of an original video data and that results in degradation of quality. Especially degradation called by blocking artifact may be produced. The blocking artifact effect is produced by DCT-based coding techniques because they operate without considering correlation between pixels in block boundaries. So it represents discontinuity between adjacent blocks. This paper describes methods of quality compensation for H.26x decoded data and enhancing encoding speed for real-time operation. Our goal of the quality compensation is not to make the decoded video identical to a original video but to make it perceived better through human eyes. We suggest an algorithm that reduces block artifact and clears decoded video in decoder. To enhance encoding speed, we adopt new four-step search algorithm. As shown in the experimental result, the quality compensation provides better video quality because of reducing blocking artifact. And then new four-step search algorithm with $MMX^{TM}$ implementation improves encoding speed from 2.5 fps to 17 fps.

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Design of 32-bit Floating Point Multiplier for FPGA (FPGA를 위한 32비트 부동소수점 곱셈기 설계)

  • Xuhao Zhang;Dae-Ik Kim
    • The Journal of the Korea institute of electronic communication sciences
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    • v.19 no.2
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    • pp.409-416
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    • 2024
  • With the expansion of floating-point operation requirements for fast high-speed data signal processing and logic operations, the speed of the floating-point operation unit is the key to affect system operation. This paper studies the performance characteristics of different floating-point multiplier schemes, completes partial product compression in the form of carry and sum, and then uses a carry look-ahead adder to obtain the result. Intel Quartus II CAD tool is used for describing Verilog HDL and evaluating performance results of the floating point multipliers. Floating point multipliers are analyzed and compared based on area, speed, and power consumption. The FMAX of modified Booth encoding with Wallace tree is 33.96 Mhz, which is 2.04 times faster than the booth encoding, 1.62 times faster than the modified booth encoding, 1.04 times faster than the booth encoding with wallace tree. Furthermore, compared to modified booth encoding, the area of modified booth encoding with wallace tree is reduced by 24.88%, and power consumption of that is reduced by 2.5%.

Enhancement of H.264/AVC Encoding Speed and Reduction of CPU Load through Parallel Programming Based on CUDA (CUDA 기반의 병렬 프로그래밍을 통한 H.264/AVC 부호화 속도 향상 및 CPU 부하 경감)

  • Jang, Eun-Been;Ha, Yun-Su
    • Journal of Advanced Marine Engineering and Technology
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    • v.34 no.6
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    • pp.858-863
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    • 2010
  • In order to enhance encoding speed in dynamic image encoding using H.264/AVC, reducing the time for motion estimation which takes a large portion of the processing time is very important. An approach using graphics processing unit(GPU) as a coprocessor to assist the central processing unit(CPU) in computing massive data, will be a way to reduce the processing time. In this paper, we present an efficient block-level parallel algorithm for the motion estimation(ME) on a computer unified device architecture(CUDA) platform developed in general-purpose computation on GPU. Experiments are carried out to verify the effectiveness of the proposed algorithm.

Reconstruction of Color-Volume Data for Three-Dimensional Human Anatomic Atlas (3차원 인체 해부도 작성을 위한 칼라 볼륨 데이터의 입체 영상 재구성)

  • 김보형;이철희
    • Journal of Biomedical Engineering Research
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    • v.19 no.2
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    • pp.199-210
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    • 1998
  • In this paper, we present a 3D reconstruction method of color volume data for a computerized human atlas. Binary volume rendering which takes the advantages of object-order ray traversal and run-length encoding visualizes 3D organs at an interactive speed in a general PC without the help of specific hardwares. This rendering method improves the rendering speed by simplifying the determination of the pixel value of an intermediate depth image and applying newly developed normal vector calculation method. Moreover, we describe the 3D boundary encoding that reduces the involved data considerably without the penalty of image quality. The interactive speed of the binary rendering and the storage efficiency of 3D boundary encoding will accelerate the development of the PC-based human atlas.

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Optimal design of Direct-Driven PM Wind Generator Using Dynamic Encoding Algorithm for Searches(DEAS) (DEAS(Dynamic Encoding Algorithm for Searches)를 이용한 풍력발전기 최적설계)

  • Jung, Ho-Chang;Lee, Cheol-Gyun;Kim, Jong-Wook;Kim, Eun-Su;Jung, Sang-Yong
    • Proceedings of the KIEE Conference
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    • 2008.04c
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    • pp.59-61
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    • 2008
  • Optimal design of the direct-driven PM Wind Generator, combined with DEAS(Dynamic Encoding Algorithm for Searches) and FEM(Finite Element Method), has been proposed to maximize the Annual Energy Production(AEP) over the whole wind speed characterized by the statistical model of wind speed distribution. In particular, DEAS has been contributed to reducing the excessive computing time for the optimization process.

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Optimal Design of Direct-Driven Wind Generator Using Dynamic Encoding Algorithm for Searches(DEAS) (DEAS를 이용한 직접구동형 풍력발전기 최적설계)

  • Jung, Ho-Chang;Lee, Cheol-Gyun;Kim, Eun-Su;Kim, Jong-Wook;Jung, Sang-Yong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.10
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    • pp.24-33
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    • 2008
  • Optimal design of the direct-driven PM Wind Generator, combined with DEAS(Dynamic Encoding Algorithm for Searches) and FEM(Finite Element Method), has been proposed to maximize the Annual Energy Production(AEP) over the whole wind speed characterized by the statistical model of wind speed distribution. In particular, DEAS contributes to reducing the excessive computing time for the optimization process.

Serialization Method for large spatial data transmission of High Definition Map (정밀도로지도의 대용량 공간데이터 교환을 위한 직렬화 기법 설계)

  • Eun-Il, LEE;Duck-Ho, KIM
    • Journal of the Korean Association of Geographic Information Studies
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    • v.25 no.4
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    • pp.32-48
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    • 2022
  • This study presented a spatial data serialization technique that can efficiently store and transmit large amounts of spatial data for precision road maps was designed and implemented. For efficient serialization, a binary spatial data structure is defined, and a coordinate value encoding technique without loss of information is designed using the Zigzag-Z-order curve. The spatial data serialization technique designed for precision road maps was tested, and the data size and encoding/decoding speed after encoding were compared with Protocol buffer and Geobuff. As a result, it was confirmed that the designed serialization method was excellent in data weight reduction performance and encoding speed. However, the decoding speed was inferior to other serialization techniques in linestring and polygon type spatial data. Through this study, it was confirmed that spatial data can be efficiently encoded, stored, and transmitted using binary serialization techniques.

Fast Prediction Mode Decision in HEVC Using a Pseudo Rate-Distortion Based on Separated Encoding Structure

  • Seok, Jinwuk;Kim, Younhee;Ki, Myungseok;Kim, Hui Yong;Choi, Jin Soo
    • ETRI Journal
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    • v.38 no.5
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    • pp.807-817
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    • 2016
  • A novel fast algorithm is suggested for a coding unit (CU) mode decision using pseudo rate-distortion based on a separated encoding structure in High Efficiency Video Coding (HEVC). A conventional HEVC encoder requires a large computational time for a CU mode prediction because prediction and transformation procedures are applied to obtain a rate-distortion cost. Hence, for the practical application of HEVC encoding, it is necessary to significantly reduce the computational time of CU mode prediction. As described in this paper, under the proposed separated encoder structure, it is possible to decide the CU prediction mode without a full processing of the prediction and transformation to obtain a rate-distortion cost based on a suitable condition. Furthermore, to construct a suitable condition to improve the encoding speed, we employ a pseudo rate-distortion estimation based on a Hadamard transformation and a simple quantization. The experimental results show that the proposed method achieves a 38.68% reduction in the total encoding time with a similar coding performance to that of the HEVC reference model.

A Study on an Improved H.264 Inter mode decision method (H.264 인터모드 결정 방법 개선에 관한 연구)

  • Gong, Jae-Woong;Jung, Jae-Jin;Hwang, Eui-Sung;Kim, Tae-Hyoung;Kim, Doo-Young
    • Journal of the Institute of Convergence Signal Processing
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    • v.9 no.4
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    • pp.245-252
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    • 2008
  • In this paper, we propose a new method for improving the H 264 encoding process and motion estimation part. Our approach is a method to reduce the encoding running time through the omission of reference frame in the mode selection process of H 264 and an improvement of SAD computing process. To evaluate the proposed method, we used the H 264 standard image of QCIF size and TIN 4:2:0 format. Experimental results show that proposed SAD algorithm 1 can improve the speed of encoding runnung time by an average of 4.7% with a negligible degradation of PSNR. However, SAD algorithm 2 can improve the speed of encoding runnung time by an average of 9.6% with 0.98dB degradation of PSNR.

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