Journal of Advanced Marine Engineering and Technology

The Korean Society of Marine Engineering (한국마린엔지니어링학회)
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Enhancement of H.264/AVC Encoding Speed and Reduction of CPU Load through Parallel Programming Based on CUDA

CUDA 기반의 병렬 프로그래밍을 통한 H.264/AVC 부호화 속도 향상 및 CPU 부하 경감

  • 장은빈 (한국해양대학교 IT공학부) ;
  • 하윤수 (한국해양대학교 IT 공학부)
  • Received : 2010.06.11
  • Accepted : 2010.08.06
  • Published : 2010.09.30
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Abstract

In order to enhance encoding speed in dynamic image encoding using H.264/AVC, reducing the time for motion estimation which takes a large portion of the processing time is very important. An approach using graphics processing unit(GPU) as a coprocessor to assist the central processing unit(CPU) in computing massive data, will be a way to reduce the processing time. In this paper, we present an efficient block-level parallel algorithm for the motion estimation(ME) on a computer unified device architecture(CUDA) platform developed in general-purpose computation on GPU. Experiments are carried out to verify the effectiveness of the proposed algorithm.

H.264/AVC를 이용한 동영상의 부호화에서 그 속도를 높이기 위해서는 움직임 예측시간을 줄이는 것이 매우 중요하다. 본 논문에서는 H.264/AVC 부호기의 오픈 소스인 x.264를 대상으로 움직임 예측 알고리즘을 CUDA 기반에서 구현함으로서 기존의 압축 기술 이상의 속도 향상 및 CPU의 점유율을 경감 시킬 수 있음을 검증한다.

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References

  1. lain E.G Richardson, H.264 & MPEG-4 차세대 영상압축기술, 홍릉과학출판사, 2004.
  2. x264. http://en.wikipedia.org/wiki/X264.
  3. The GPGPU Resources and Forums, http://www.gpgpu.org/.
  4. NVidia Corp. CUDA Zone. http://www.nvidia.com.
  5. S.-Y Chien, Y.-W Huang, C.-Y Chen, H.-H Chen and L.-G Chen, "Hardware architecture design of video compression for multimedia communication systems," IEEE Commun. Mag.,vol. 43, no. 8, pp. 122-31, 2005.
  6. C.-W Ho, O. Au, S.-H. Chan, S.-K Yip and H.-M Wong, "Motion estimation for H.264/AVC using programmable graphics hardware", Proc. IEEE International Conference on Multimedia and Expo, pp. 2049-2052, 2006.
  7. R.-X. Chen and J. Fan, "Complexity reduction for SOPCbased H.264/AVC coder via sum of absolute difference", Proc. IEEE/CIE 7th International Conference on ASIC, pp. 1277-1280, 2007.