• The Journal of the Korea Contents Association
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• v.12 no.4
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• pp.31-39
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• 2012

DVC(Distributed Video Coding) techniques have been attracting a lot of research works since these enable us to implement the light-weight video encoder and to provide good coding efficiency by introducing the feedback channel. However, the feedback channel causes the decoder to increase the decoding complexity and requires very high decoding latency because of numerous iterative decoding processes. So, in order to reduce the decoding delay and then to implement in a real-time environment, this paper proposes several parity bit estimation methods which are based on the temporal correlation, spatial correlation and spatio-temporal correlations between LDPCA frames on each bit plane in the consecutive video frames in pixel-domain Wyner-Ziv video coding scheme and then the performances of these methods are compared in fast DVC scheme. Through computer simulations, it is shown that the adaptive spatio-temporal correlation-based estimation method and the temporal correlation-based estimation method outperform others for the video frames with the highly active contents and the low active contents, respectively. By using these results, the proposed estimation schemes will be able to be effectively used in a variety of different applications.

• KIISE Transactions on Computing Practices
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• v.24 no.3
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• pp.138-144
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• 2018

A video is a vivid medium similar to human's visual-linguistic experiences, since it can inculcate a sequence of situations, actions or dialogues that can be told as a story. In this study, we propose story learning/regeneration frameworks from videos with successive event order supervision for contextual coherence. The supervision induces each episode to have a form of trajectory in the latent space, which constructs a composite representation of ordering and semantics. In this study, we incorporated the use of kids videos as a training data. Some of the advantages associated with the kids videos include omnibus style, simple/explicit storyline in short, chronological narrative order, and relatively limited number of characters and spatial environments. We build the encoder-decoder structure with successive event order embedding, and train bi-directional LSTMs as sequence models considering multi-step sequence prediction. Using a series of approximately 200 episodes of kids videos named 'Pororo the Little Penguin', we give empirical results for story regeneration tasks and SEOE. In addition, each episode shows a trajectory-like shape on the latent space of the model, which gives the geometric information for the sequence models.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.9A
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• pp.694-701
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• 2003

In this paper, we present a hardware structure and new features of a smart antenna BTS (Base Transceiver Station) for CDMA2000 1X system. The proposed smart antenna BTS is a composite system consisting of many subsystems, i.e., array antenna element, frequency up/down converters, AD (Analog-to-Digital) and DA (Digital-to-Analog) converters, spreading/despreading units, convolutional encoder/Viterbi decoder, searcher, tracker, beamformer, calibration unit etc. Through the experimental tests, we found that the desired beam-pattern in both uplink and downlink communications is provided through the calibration procedure. Also it has been confirmed that the adaptive beamforming algorithm adopted to our smart antenna BTS is fast and accurate enough to support 4 fingers to each user. In our experiments, commercial mobile terminals operating PCS (Personal Communication System) band have been used. It has been confirmed that the smart antenna BTS tremendously improves the FER (Frame Error Rate) performance compared to the conventional 2-antenna diversity system.

• Journal of Digital Contents Society
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• v.3 no.2
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• pp.197-209
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• 2002

If we reduce the number of vertexes to decrease bit rate in polygon-based shape coding, the distortion of approximated contour increases rapidly. On the other hand, if we reduce the distortion, the number of vertexes increases rapidly and many bits are required to encode the vertexes. To improve this problem, in this paper we propose the approximation vertex search method. The encoder in the proposed method searches the type of distortion patterns that is the most similar to the shape which polygon edge and contour segment form and then encodes it. And then, the decoder mathematically finds the approximated vertexes from decoded distortion pattern information. Therefore, the proposed algorithm results in encoding many vertexes at a low bit rate and having the smoother shape than conventional method. As shown in computer simulation, the proposed method has less distortion than conventional method. It costs less bit rate by $10{\sim}20%$ than conventional algorithm in same distortion.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.43 no.3 s.309
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• pp.92-99
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• 2006

In this paper, a low-power deblocking filter structure for H.264 video coding algorithm is proposed. By sharing addition hardware for common filter coefficients, we have designed an efficient deblocking filter structure. Proposed deblocking filter utilizes MUX and DEMUX circuits for input data sharing and shows 44.2% reduction for add operation. In the HDL coding simulation and FPGA implementation, we achieved 19.5% and 19.4% gate count reduction, respectively, comparison with the conventional deblocking filter structure. Due to its efficient processing scheme, the proposed structure can be widely used in H.264 encoding and decoding SoC.

• The Transactions of the Korea Information Processing Society
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• v.7 no.8
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• pp.2473-2483
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• 2000

In this paper, The turbo code is used to effectively remove noise which is generated on the image communication channel. Turbo code had excellent decoding performance. However, it had limitations for real time communication because of the system complexity and time delay in decoding procedure. To overcome this problem, this paper proposed a new SRI(Semi Random Interleaved algorithm, which decrease the time delay, when the image data, which reduced the interleaver size of turbo code encoder and decoder, transmitted. The SRI algorithm was composed of 0.5 interleaver size from input frame sequence. When the data inputs in interleaver, the data recorded by row such as block interleaver. But, When the data read in interleaver, the data was read by randomly and the next data located by the just address simultaneously. Therefore, the SRI reduced half-complexity when it was compared with pre-existing method such as block, helical, random interleaver. The image data could be the real time processing when the SRI applied to turbo code.

• Journal of Communications and Networks
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• v.2 no.1
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• pp.76-84
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• 2000

Communication systems, including cell-based mobile communication systems, multiple satellite communication systems of multi-beam satellite systems, require reliable handoff methods between cell-to-cell, satellite-to-satellite of beam-to-team, respectively. Recent measurement of a CDMA cellular system indicates that the system is in handoff at about 35% to 70% of an average call period. Therefore, system reliability during handoff is one of the major system performance parameters and eventually becomes a factor in the overall system capacity. This paper presents novel and improved techniques for handoff in cellular communications, multi-beam and multi-satellite systems that require handoff during a session. this new handoff system combines the soft handoff mechanism currently implemented in the IS-95 CDMA with code and packet diversity combining techniques and an iterative decoding algorithm (Turbo Coding). the Turbo code introduced by Berrou et all. has been demonstrated its remarkable performance achieving the near Shannon channel capacity [1]. Recently. Turbo codes have been adapted as the coding scheme for the data transmission of the third generation international cellular communication standards : UTRA and CDMA 2000. Our proposed encoder and decoder schemes modified from the original Turbo code is suitable for the code and packet diversity combining techniques. this proposed system provides not only an unprecedented coding gain from the Turbo code and it iterative decoding, but also gain induced by the code and packet diversity combining technique which is similar to the hybrid Type II ARQ. We demonstrate performance improvements in AWGN channel and Rayleigh fading channel with perfect channel state information (CSI) through simulations for at low signal to noise ratio and analysis using exact upper bounding techniques for medium to high signal to noise ratio.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.3
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• pp.397-409
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• 1993

This paper proposed the design methodology of the 8 bit binary parallel adder with carry book-ahead scheme via current-mode CMOS multivalued logic and simulated the proposed adder under $5{\mu}m$ standard IC process technology. The threshold conditions of $G_K$ and $P_K$ which are needed for m-valued parallel adder with CLA are evaluated and adopted for quaternary logic. The design of quaternary CMOS logic circuits, encoder, decoder, mod-4 adder, $G_K$ and $P_K$ detecting circuit and current-voltage converter is proposed and is simulated to prove the operations. These circuits are necessary for binary arithmetic using multivalued logic. By comparing with the conventional binary adder and the CCD-MVL adder, We show that the proposed adder cab be designed one look-ahead carry generator with 1-level structure under standard CMOS technology and confirm the usefulness of the proposed adder.

• Journal of IKEEE
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• v.23 no.4
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• pp.1250-1256
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• 2019

Although one can easily generate real-world 3D mesh data using a 3D printer or a depth camera, the generated data inevitably includes unnecessary noise. Therefore, mesh denoising is essential to obtain intact 3D mesh data. However, conventional mathematical denoising methods require preprocessing and often eliminate some important features of the 3D mesh. To address this problem, this paper proposes a deep learning based 3D mesh denoising method. Specifically, we propose a convolution-based autoencoder model consisting of an encoder and a decoder. The convolution operation applied to the mesh data performs denoising considering the relationship between each vertex constituting the mesh data and the surrounding vertices. When the convolution is completed, a sampling operation is performed to improve the learning speed. Experimental results show that the proposed autoencoder model produces faster and higher quality denoised data than the conventional methods.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.4
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• pp.214-221
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• 2003

This paper shows an implementation of video codec (coder/decoder) on an embedded system. The video codec supports both H.261 and H.263 standards. For efficient real-time processing, the video codec is partitioned into a software module and a hardware module. Both modules are codesigned on an embedded system. The software module is processed on a real-time operating system and a RISC processor. It cooperates with the hardware module to compress and decompress images in real time. AMBA (Advanced Microcontroller Bus Architecture) AHB (Advanced High-performance Bus) is used as the system bus. The hardware module works both as AHB masters and as AHB slaves. The encoder part of the hardware module operates in a pipelines mode to compress images in real time. The video codec compresses 15 CIF frames and simultaneously decompresses 15 CIF frames in a second according to H.261 or H.263 standard at 33 MHz frequency.