• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.10
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• pp.89-95
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• 1990

A model for bipolar-CMOS buffer design is presented which offers a guideline for determining device sizes based on speed and capacitive load. Closed-form solutions for area optimization are obtained assuming high level injection and channel velocity limitation. The solutions and circuit simulations show that the areas of BICMOS buffers are optimized by scaling the emitter length and the channel width approximately in proportion with capacitive load.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.245-248
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• 2000

In this paper, we present a high-performance SiGe HBT's RF input impedance parameter extraction method. The SiGe HBT has emitter width of 0.5${\mu}{\textrm}{m}$ and length of 6${\mu}{\textrm}{m}$. S-parameter has been measured with the collector current of 1~3㎃ using on-wafer RF measuring system . The pre-calculation method was used in order to overcome the local minimum problem. This method enabled us to extract a RF(1~10㎓) input impedance parameter.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.4
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• pp.84-92
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• 1998

A program was developed to analyze the electrical characteristics and harmonic distrotion in a two-dimensional silicon BJT. The finite difference equations of the small signal and its second and thired harmonics for basic semiconductor equations are formulated treating the nonlinearity and time dependence with Volterra series and Taylor series. The soluations for three sets of simultaneous equations were obtained sequantially by a decoupled iteration method and each set was solved by a modified Stone's algorithm. Distortion magins and ac parameters such as input impedance and current gains are calculated with frequency and load resistance as parameters. The distortion margin vs. load resistancecurves show cancellation minima when the pahse of output voltage shifts. It is shown that the distortionof small signal characteristics can be reduced by reducing the base width, increasing the emitter stripe length and reducing the collector epitaxial layer doping concentration in the silicon BJT structure. The simulation program called TRADAP can be used for the design and optimization of transistors and circuits as well as for the calculation of small signal and distortion solutions.

• Current Photovoltaic Research
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• v.2 no.4
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• pp.173-176
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• 2014

We have investigated the seed layer formation of front side contact using the inkjet printing process. Conductive silver ink was printed on textured Si wafers with 80 nm thick $SiN_x$ anti reflection coating (ARC) layers and thickened by light induced plating (LIP). The inkjet printable sliver inks were specifically formulated for inkjet printing on these substrates. Also, a novel method to prepare nano-sized glass frits by the sol-gel process with particle sizes around 5 nm is presented. Furthermore, dispersion stability of the formulated ink was measured using a Turbiscan. By implementing these glass frits, it was found that a continuous and uniform seed layer with a line width of $40{\mu}m$ could be formed by a inkjet printing process. We also investigated the contact resistance between the front contact and emitter using the transfer length model (TLM). On an emitter with the sheet resistance of $60{\Omega}/sq$, a specific contact resistance (${\rho}_c$) below $10m{\Omega}{\cdot}cm^2$ could be achieved at a peak firing temperature around $700^{\circ}C$. In addition, the correlation between the contact resistance and interface microstructures were studied using scanning electron microscopy (SEM). We found that the added glass particles act as a very effective fire through agent, and Ag crystallites are formed along the interface glass layer.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.2
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• pp.114-121
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• 2001

A circuit model for active-controlled field emitter array(ACFEA) as an electron source of active-controlled field emission display(ACFED) has been proposed. The ACFEA with hydrogenated amorphous silicon thin-film transistor(a-Si:H TFT) and Spindt-type molibdenum tips (Spindt-Mo FEA) has been fabricated monolithically on the same glass. A-Si:H TFT is used as a control device of field emitters, resulting in stabilizing emission current and lowering driving voltage. The basic model parameters extracted from the electrical characteristics of the fabricated a-Si:H TFT and Spindt-Mo FEA were implemented into the ACFEA model with a circuit simulator SPICE. The accuracy of the equivalent circuit model was verified by comparing the simulated results with the measured one through DC analysis of the ACFEA. The transient analysis of the ACFEA showed that the gate capacitance of FEA along with the drivability of TFT strongly affected the response time. With the fabricated ACFEA, we obtained a response time of 15$mutextrm{s}$, which was enough to make 4bit/color gray scale with the pulse width modulation (PWM).

• Korean Journal of Materials Research
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• v.9 no.9
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• pp.890-895
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• 1999

The recent important issue in solar cell fabrication is to adopt thin film silicon solar cells on cheap substrates. However, thin cells demand new grid design concept that all the contacts(to the emitter and base) be located on the front surface. Hence, the aim of the investigation presented in this paper was to determine the potential and the basic limitation of the design. With this concept, an interdigitated front grid structure was realized and cells were fabricated through a set of photolithography processes. Confirmed efficiencies of up to 11.5% were achieved on bonded SOI wafers with a cell thickness of 50$\mu\textrm{m}$ in the case of finger spacing more than $\mu\textrm{m}$ and a base width of 35$\mu\textrm{m}$. It was also shown from the results that the design rules for optimizing the base fraction and reducing the shadowing fraction are noted as an important technique to realize high-efficiency thin silicon solar cells.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.6
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• pp.567-575
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• 2017

The direction finder is an important device for an electronic support(ES) system because it is responsible for finding the direction of an emitter. The higher the accuracy of the direction finding, the higher the vitality of the weapon system with the ES system. Recently, the direction error occurred in the operating shipboard ES system when direction finding was performed for the signal with a pulse width of 200 ns. Therefore, this paper proposes, an improved method to reduce the direction error for shipboard ES systems. The proposed method was applied to the operating shipboard ES system and a field test was performed. The results of the field test showed that the direction error was reduced significantly for the signal with a pulse width of 200 ns.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.205.2-205.2
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• 2016

The emission test a domestic fabricated cathode is conducted using an easy-replaceable-emitter-type test bench. A simple cylindrical button type cathode is dropped vertically into a cathode cup holder. The cathode is heated by a tungsten wire heater located around the cup holder. The cathode temperature is measured by an optical pyrometer. A high voltage pulse power supply gives the anode-cathode gap voltage up to 20 kV with the pulse width of 15 us. The emitted current from the cathode is captured at a faraday cup and is measured using current transformer and oscilloscope. The test bench is installed in the vacuum chamber with easy access door and, therefore, the cathode can be easily replaceable. We confirmed the emission current density of $15A/cm^2$ and $80A/cm^2$ with a domestic fabricated B-type cathode and a Scandate cathode, respectively. The detailed test result for the cathode will be presented.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.8
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• pp.8-14
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• 1998

A new process is developed to improve the electrical characteristics of high .beta. and low saturation voltage power transistor for lamp solenoid driver application. To prevent punch-through breakdown, appropriate combination of base doping and base width is necessary in the range of operating voltage of the circuit. The optimum values of base doping and sheet resistance are $Q_{D}$= $1.5{\times}10^{14}$atoms/$\textrm{cm}^2$ and $R_{s}$= 350 $\Omega/\square$ base wodtj $W_{B}$= $2.5{\mu}m$respectively. Under this condition it is possible to control $\beta$ of the transistor to 1500, maintaining $VB_{CBO}$ =200V. To reduce scattered distribution of .beta. of the devices on the wafer, it is necessary to improve emittter predeposition process. As a result, scattered distribution of .beta. of the devices on the wafer was reduced to 1/6 by using the new process. To improve collector to emitter forward voltage drop, $V_{ECF}$ of damper diode, an additional silicon etching process is used, which resulted in improving the value of $V_{eCF}$ from 2.8 V to 1.8V. With the suggested process superior device performance and higher yield are achieved.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.137-144
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• 2014

The Electronic Support System collects and analyzes the received radar signals in order to cope with the electronic attack in real-time. The radar-pulse clustering system classifies the radar signals that are considered to be emitted by a single source. This paper proposed a radar-pulse clustering algorithm based on four kinds of features: the direction, frequency, pulse width, and the difference of arrival time between two successive pulses. The experiment results show that the proposing algorithm could trace the moving emitter and classify the timely separated signals into different classes.