• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1591-1593
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• 2008

The tubular field emission lamp (FEL) was developed using a wire type carbon-nano-structure emitter called CNX The luminous efficiency of the tubular FEL (diode type, diameter: ${\varphi}15.5mm$, length: 200mm) has already achieved around 45lm/W and we expect to achieve over 60lm/W within the year.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.100.2-100.2
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• 2012

Surface texturing of crystalline silicon is carried out in alkaline solutions for anisotropic etching that leads to random pyramids of about $10{\mu}m$ in size. Recently textured pyramids size gradually reduced using new solution. In this paper, we investigated that texture pyramids size had an impact on emitter property and front electrode (Ag) contact. To make small (${\sim}3{\mu}m$) and large (${\sim}10{\mu}m$) pyramids size, texturing times control and one side texturing using a silicon nitride film were carried out. Then formation and quality of POCl3-diffused n+ emitter in furnace compare with small and large pyramids by using SEM images, simulation (SILVACO, Athena module) and emitter saturation current density (J0e). After metallization, Ag contact resistance was measured by transfer length method (TLM) pattern. And surface distributions of Ag crystallites were observed by SEM images. Also, performance of cell which is fabricated by screen-printed solar cells is compared by light I-V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.5
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• pp.366-370
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• 2019

In this paper, a single N+ emitter trench gate-type insulated gate bipolar transistor (IGBT) device was studied using T-CAD, in order to achieve a low on-state voltage drop (Vce-sat) and high breakdown voltage, which would reduce power loss and device reliability. Using the simulation, the threshold voltage, breakdown voltage, and on-state voltage drop were studied as a function of the temperature, the length of time in the diffusion process (drive-in) after implant, and the trench gate depth. During the drive-in process, a $20^{\circ}C$ change in temperature from 1,000 to $1,160^{\circ}C$ over a 150 minute time frame resulted in a 1 to 4 V change in the threshold voltage and a 24 to 2.6 V change in the on-state voltage drop. As a result, a 0.5 um change in the trench depth of 3.5 to 7.5 um resulted in the breakdown voltage decreasing from 802 to 692 V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.553-556
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• 1999

This paper presents a proper condition to achieve above 19 % conversion efficiency using PC1D simulator. Cast poly-Si wafers with resistivity of 1 $\Omega$-cm and thickness of 250 ${\mu}{\textrm}{m}$ were used as a starting material. Various efficiency influencing parameters such as rear surface recombination velocity and minority carrier diffusion length in the base region, front surface recombination velocity, junction depth and doping concentration in the Emitter layer, BSF thickness and doping concentration were investigated. Optimized cell parameters were given as rear surface recombination of 1000 cm/s, minority carrier diffusion length in the base region 200 ${\mu}{\textrm}{m}$, front surface recombination velocity 100 cnt/s, sheet resistivity of emitter layer 100 $\Omega$/$\square$, BSF thickness 5 ${\mu}{\textrm}{m}$, doping concentration 5$\times$10$^{19}$ cm$^3$ . Among the investigated variables, we learn that a diffusion length of base layer acts as a key factor to achieve conversion efficiency higher than 19 %. Further details of simulation parameters and their effects to cell characteristics are discussed in this paper.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.4 s.310
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• pp.45-52
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• 2006

In his paper, we have developed the SMD(surface mounted device) type PECL(positive emitter-coupled logic) VCXO of the $5{\times}7mm$ size for gratifying the requested specifications and the multilayer ceramic SMD(surface mounted device) package technology. The VCXO wired with the PECL(positive emitter coupled logic) package take place a stray inductance and a parasitic capacitance by the length and the inner pattern of the VCXO and the amplitude attenuation and signal loss due to the reflection of power source and the noise component. We have developed the Zig system to analyze the precise spectrum and evaluate the performance. The basic operating voltage is the 3.3 V and have the frequency range of 120MHz-180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

• Proceedings of the Korean Nuclear Society Conference
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• 1996.05d
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• pp.101-106
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• 1996

For the application of the neutron flux mapping, an accurate calculation of the sensitivity is required because the sensitivity is proportional to the neutron flux density. Sensitivity is defined as the current per unit length per unit neutron flux and it mainly depends on the depression factor(f), the escape probability from the emitter($\varepsilon$1) and the charge build-up factor of the insulator layer(c). A Monte Carlo simulation was accomplished to calculate the sensitivity of rhodium emitter material and alumina(Al$_2$O$_3$) insulator with a cylindrical geometry, based on the (n,${\beta}$) interaction and on other interaction including the secondary electron generation for the more accurate estimation of the sensitivity. From the simulation results, factors fur the sensitivity were accurately calculated and compared with other theoretical and experimental values. In addition, the sensitivity linearly increases and saturates as the emitter radius increases. The accomplished method is useful in the analysis for the change of SPND sensitivity as a function of burn-up and in the optimum design of SPND.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1410-1411
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• 2011

Tip-type carbon nanotube(CNT) based electron emitters were fabricated by forming a hafnium(Hf) interlayer between the CNT and the substrate. The CNTs were deposited by using the electrophoretic deposition method and thermally treated. No significant change in the microscopic structure of the CNTs, such as the ratio of length to diameter, was observed after the deposition of Hf interlayer and thermal treatment. As compared with the CNT emitter without the Hf-interlayer and thermal treatment, the CNT emitter with the Hf-interlayer and thermal treatment showed noticeably improved electron-emission properties due to the enhanced adhesion.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.43-43
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• 2003

Carbon nanotubes(CNTs) have many application points, which are field emission devices, composites, hydrogen storage, nanodevices, supercapacitor and secondary battery. The most promising application point is emitter tip mays of field emission devices. Furthermore, it may be also useful as a vacuum device for high frequency and high power. But, there are some obstacles to fabricate carbon nanotube field emission device. One is that CNTs grown by CVD method has weak adhesion with substrate and the other is non-uniform length of them. These problems are very crucial in aging property and reliability of device in the field emission.

• Journal of Korean Vacuum Science & Technology
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• v.3 no.1
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• pp.59-65
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• 1999

There has been an interest to develop an efficient, compact microwave device using field-emitter-arrays (FEA)-based cathode. Toe valuate the optimum device-efficiency in a compact size, the propagation properties of the premodulated electron beam for the FEA-based cathode is studied in detail by the computer simulation using a PIC code, MAGIC. For the premodulated electron beam whose phase of the energy leads the phase of the current by $\pi$/2, the amplitude of the downstream current modulation can be kept as high as the initial modulation level. Using the beam parameters with the beam voltage of 6kV and the current of 2.0A, 30% of efficiency is predicted when the quality factor of 800 is chosen. the device length is reduced about twice compared with that of the conventional device. The design of practical planar cathode is carried out to meet the minimum diameter of the electron beam as 0.5 mm.

• Journal of the Semiconductor & Display Technology
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• v.16 no.1
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• pp.65-69
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• 2017

This paper presents a Technology-CAD (TCAD) simulation of the characteristics of crystalline Si pillar array solar cells. The junction depth and the surface concentration of the solar cells were optimized to obtain the targeted sheet resistance of the emitter region. The diffusion model was determined by calibrating the emitter doping profile of the microscale silicon pillars. The dimension parameters determining the pillar shape, such as width, height, and spacing were varied within a simulation window from ${\sim}2{\mu}m$ to $5{\mu}m$. The simulation showed that increasing pillar width (or diameter) and spacing resulted in the decrease of current density due to surface area loss, light trapping loss, and high reflectance. Although increasing pillar height might improve the chances of light trapping, the recombination loss due to the increase in the carrier's transfer length canceled out the positive effect to the photo-generation component of the current. The silicon pillars were experimentally formed by photoresist patterning and electroless etching. The laboratory results of a fabricated Si pillar solar cell showed the efficiency and the fill factor to be close to the simulation results.