• Proceedings of the Korean Society For Composite Materials Conference
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• 2005.04a
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• pp.33-36
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• 2005

In this research, for the smart health monitoring of the hydrogen storage high pressure composite vessel, the feasibility study of an embedded fiber Bragg grating(FBG) sensor is carried out. To verify strain measurement in various temperature environment which is needed for the hydrogen pressure vessel, tensile test of a composite specimen with both an embedded FBG sensor and a strain gauge is made in low temperature. Before we try a real-size hydrogen storage pressure vessel, a small & cheap composite pressure vessel having the same structure is fabricated with embedded FBG sensors and tested. In the case of an aluminum liner inside the vessel, survivability of FBG sensors at the interface is lower than the other areas.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2397-2401
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• 2005

It is well understood that force reflecting coupled with visual display can be an important two-way communication channel in human-computer interaction. In this work, important components for a high-fidelity system bandwidth are force reflecting device and that all the computations including contact determination and response computation have to be performed in less than a millisecond. This paper describes a force-reflecting device and an embedded controller. The realized force-reflecting device is based on a novel serial type mechanical structure, and features compactness, high sustained output force capability, low friction, zero backlash, and enough workspace. The embedded controller reduces software computational load via main processor and simplifies hardware strictures by the time-division control. The device is integrated with existing dynamic simulation algorithms running separate workstation, so that objects can be manipulated in real time and the corresponding forces felt back by the operator.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.938-939
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• 2008

Embedded OS is used widely in many case of today's systems. Using of Embedded OS for IED(Intelligent electronic device) is vary useful method of the processing of complex operations. In this paper, we designed embedded OS module for use as a more effective way in IED systems.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.223-223
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• 2000

Embedded system area has brought an innovation and has been spread rapidly by the growth of the Internet, wireless telephony and multimedia recently. Many embedded systems are required to be real-time systems in that it needs multi-tasking and priority based scheduling. This paper introduces a real-time system that was developed with web server ability for control and monitoring system employing a real-time operating system. It discusses the design model, structure, and applications of web server system. We used SNDS100 board which has a 32-bit RISC microcontroller of ARM7TDMI core as a hardware platform. MicroC/OS kernel was used as Real-time operating system that supports a preemptive and multitasking functions. We developed a hierarhchical control and monitoring system that not only reduced system and management costs, but also enhanced reusability and portability.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.1
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• pp.14-19
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• 2007

As XML is used by standard format for information expression and information exchange in various field, Many Company began to use SVG by user interface or information expression tool of embedded system such as mobile phone based wireless internet. Because SVG has many additional information to keep structure of SVG document exception real data, there is a problem that transfer time of SVG file is so cost for quantity of transmitted data actually. To solve this problem, many researches using compression conception have been conducted for applying to an embedded system. This paper proposes SMETA that can use existing researches using compression concept at once. SMETA divides SVG file to each part that can allocate meaning, and gives semantic metadata to each part without alteration of SVG structure. SMETA can reduce site of transmitted SVG file actually by transmitting specification part of SVG file that metadata does not agree or has unlisted part in an embedded system between an embedded system and server, before transmit whole SVG file. By size of transmitting SVG file is decreasing, transfer time can be shortened accordingly.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.103-111
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• 2019

The IoT-driven large-scaled systems consist of connected things with on-chip executable embedded software. These light-weighted embedded things have limited hardware space, especially small size of on-chip flash memory. In addition, on-chip embedded software in flash memory is not easy to update in runtime to equip with latest services in IoT-driven applications. It is becoming important to develop light-weighted IoT devices with various software in the limited on-chip flash memory. The remote instruction execution in cloud via IoT connectivity enables to provide high performance software execution with unlimited software instruction in cloud and low-power streaming of instruction execution in IoT edge devices. In this paper, we propose a Cloud-IoT asymmetric structure for providing high performance instruction execution in cloud, still low power code executable thing in light-weighted IoT edge environment using remote instruction execution. We propose a simulated approach to determine efficient partitioning of software runtime in cloud and IoT edge. We evaluated the instruction cloudification using remote instruction by determining the execution time by the proposed structure. The cloud-connected instruction set simulator is newly introduced to emulate the behavior of the processor. Experimental results of the cloud-IoT connected software execution using remote instruction showed the feasibility of cloudification of on-chip code flash memory. The simulation environment for cloud-connected code execution successfully emulates architectural operations of on-chip flash memory in cloud so that the various software services in IoT can be accelerated and performed in low-power by cloudification of remote instruction execution. The execution time of the program is reduced by 50% and the memory space is reduced by 24% when the cloud-connected code execution is used.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.3
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• pp.209-216
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• 2011

Recently the design of SoCs(System-on-Chips) in which TCM is embedded for high speed operation increases rapidly. In this paper, a parallel test structure for eDRAM-based TCM embedded in SoCs is proposed. In the presented technique, the MUT (Memory Under Test) is changed to parallel structure and it increases testability of MUT with boundary scan chains. The eDRAM is designed in structure for parallel test so that it can be tested for each modules. Dynamic test can be performed based on input-output data. The proposed techniques are verified their performance by circuits simulation.

• Journal of Satellite, Information and Communications
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• v.10 no.4
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• pp.1-5
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• 2015

The ESD(electrostatic discharge) protection performance of PPS(PMOS pass structure) embedded N-type silicon controlled rectifier(NSCR_PPS) device with different partial p-well(PPW) structure was discussed for high voltage I/O applications. A conventional NSCR_PPS standard device shows typical SCR-like characteristics with low on-resistance, low snapback holding voltage and low thermal breakdown voltage, which may cause latch-up problem during normal operation. However, our proposed NSCR_PPS devices with modified PPW_PGM(primary gate middle) and optimal CPS(counter pocket source) implant demonstrate the stable ESD protection performance with high latch-up immunity.

• 한국전산유체공학회:학술대회논문집
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• 2011.05a
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• pp.117-123
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• 2011

The low electric power and high efficiency chips are required because of the appearance of smart phones. Also, high-capacity memory chips are needed. e-MMC(embedded Multi-Media Card) for this is defined by JEDEC(Joint Electron Device Engineering Council). The e-MMC memory for research and development is a memory mulit-chip module of 64GB using 16-multilayers of 4GB NAND-flash memory. And it has simplified the chip by using SIP technique. But mulit-chip module generates high heat by higher integration. According to the result of study, whenever semiconductor chip is about 10 $^{\circ}C$ higher than the design temperature it makes the life of the chip shorten more than 50%. Therefore, it is required that we solve the problem of heating value and make the efficiency of e-MMC improved. In this study, geometry of 16-multilayered structure is compared the temperature distribution of four different geometries along the numerical analysis. As a result, it is con finned that a multilayer structure of stair type is more efficient than a multilayer structure of vertical type because a multi-layer structure of stair type is about 9 $^{\circ}C$ lower than a multilayer structure of vertical type.

• Journal of KSNVE
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• v.6 no.1
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• pp.65-70
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• 1996

The sensor response of a piezoelectric transducer embedded in a fluid loaded structure is modeled using a hybrid numerical approach. The structure is excited by an obliquely incident acoustic wave. Finite element modeling in the structure and fluid surrounding the transducer region, is used and a plane wave representation is exploited to match the displacement field at the mathematical boundary. On this boundary, continuity of field derivatives is enforced by using a penalty factor and to further achieve transparency at the mathematical boundary, drilling degrees of freedom (d.o.f.) are introduced to ensure continuity of all derivatives. Numerical results are presented for the sensor response and it is found that the sensor at that location is not only non-intrusive but also sensitive to the characteristic of the structure.