• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.12B
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• pp.1022-1036
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• 2004

In mobile cellular network the ever-changing location of a mobile host necessitates the continuous tracking of its current position and efficient management of location information. A database called Home Location Register(HLR) plays a major role in location management in this distributed environment, providing table management, index management, and backup management facilities. The objectives of this paper are to identify the p개blems of the current HLR system through rigorous analysis, to suggest solutions to them, and to propose a new architecture for the HLR system. In the HLR system, a main memory database system is used to provide real-time accesses and updates of subscriber's information. Thus it is suggested that the improvement bemade to support better real-time facilities, to manage subscriber's information more reliably, and to accommodate more subscribers. In this paper, I propose an efficient backup method that takes into account the characteristics of HLR database transactions. The retrieval speed and the memory usage of the two-level index method are better than those of the T-tree index method. Insertion md deletion overhead of the chained bucket hashing method is less than that of modified linear hashing method. In the proposed backup method, I use two kinds of dirty flags in order to solve the performance degradation problem caused by frequent registration-location operations. Performance analysis has been performed to evaluate the proposed techniques based on a system with subscribers. The results show that, in comparison with the current techniques, the memory requirement is reduced by more than 62%,directory operations, and backup operation by more than 80%.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.6
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• pp.293-303
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• 2008

As the computing environment moves to the wireless and handheld system, the power efficiency is getting more important. That is the case especially in the embedded hand-held system and the power consumed by the memory system takes the second largest portion in overall. To save energy consumed in the memory system we can utilize low power mode of SDRAM. In the case of RDRAM, nap mode consumes less than 5% of the power consumed in active or standby mode. However hardware controller itself can't use this facility efficiently unless the operating system cooperates. In this paper we focus on how to minimize the number of active units of SDRAM. The operating system allocates its physical pages so that only a few units of SDRAM need to be activated and the unnecessary SDRAM can be put into nap mode. This work can be considered as a generalized and system-wide version of PAVM(Power-Aware Virtual Memory) research. We take all the physical memory into account, especially buffer cache, which takes an half of total memory usage on average. Because of the portion of buffer cache and its importance, PAVM approach cannot be robust without taking the buffer cache into account. In this paper, we analyze the RAM usage and propose power-aware page allocation policy. Especially the pages mapped into the process' address space and the buffer cache pages are considered. The relationship and interactions of these two kinds of pages are analyzed and exploited for energy saving.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.120-120
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• 2011

Graphene is a carbon based material and it has great potential of being utilized in various fields such as electronics, optics, and mechanics. In order to develop graphene-based logic systems, graphene field-effect transistor (GFET) has been extensively explored. GFET requires supporting devices, such as volatile memory, to function in an embedded logic system. As far as we understand, graphene has not been studied for volatile memory application, although several graphene non-volatile memories (GNVMs) have been reported. However, we think that these GNVM are unable to serve the logic system properly due to the very slow program/read speed. In this study, a GVM based on the GFET structure and using an engineered graphene channel is proposed. By manipulating the deposition condition, charge traps are introduced to graphene channel, which store charges temporarily, so as to enable volatile data storage for GFET. The proposed GVM shows satisfying performance in fast program/erase (P/E) and read speed. Moreover, this GVM has good compatibility with GFET in device fabrication process. This GVM can be designed to be dynamic random access memory (DRAM) in serving the logic systems application. We demonstrated GVM with the structure of FET. By manipulating the graphene synthesis process, we could engineer the charge trap density of graphene layer. In the range that our measurement system can support, we achieved a high performance of GVM in refresh (>10 ${\mu}s$) and retention time (~100 s). Because of high speed, when compared with other graphene based memory devices, GVM proposed in this study can be a strong contender for future electrical system applications.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.185-191
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• 2006

DSRC((Dedicated Short Range Communication) is dedicated short range communication for wireless communications between RSE(Road Side Equipment) and OBE(On-Board Unit) within vehicle moving high speed. In this paper, we implemented 5.8GHz DSRC modem according to Korea TTA(Telecommunication Technology Association) standard and investigated implementation results and design process for SoC(System on a Chip) embedding ARM CPU which control overall signal and process arithmetic work. The SoC is implemented by 0.11um design technology and 480pins EPBGA package. In the implemented SoC ($Jaguar^{TM}$), 5.8GHz DSRC PHY(Physical Layer) modem and MAC are designed and included. For CPU core ARM926EJ-S is embedded, and LCD controller, smart card controller, ethernet MAC, and memory controller are designed as main function.

• ETRI Journal
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• v.25 no.5
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• pp.337-344
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• 2003

In this paper, we introduce a fully synthesizable 32-bit embedded microprocessor core called the AE32000B. The AE32000B core is based on the extendable instruction set computer architecture, so it has high code density and a low memory access rate. In order to improve the performance of the core, we developed and adopted various design options, including the load extension register instruction (LERI) folding unit, a high performance multiply and accumulate (MAC) unit, various DSP units, and an efficient coprocessor interface. The instructions per cycle count of the Dhrystone 2.1 benchmark for the designed core is about 0.86. We verified the synthesizability and the area and time performances of our design using two CMOS standard cell libraries: a 0.35-${\mu}m$ library and a 0.18-${\mu}m$ library. With the 0.35-${\mu}m$ library, the core can be synthesized with about 47,000 gates and operate at 70 MHz or higher, while it can be synthesized with about 53,000 gates and operate at 120 MHz or higher with the 0.18-${\mu}m$ library.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12B
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• pp.831-837
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• 2005

Personal general purpose computer(PC) has been evolved from desktop to portable mobile device such as tablet PC and PDA. Technology innovation on semiconductor have made it possible to package a reasonably Powerful Processor and memory subsystem with advanced input/output devices. At last these subsystems are miniaturized into wearable system. Wearable computer has recently gained attention as the post PC in the ubiquitous environment. Wearable computing becomes more and more feasible and receives growing attention throughout industry and the consumer marketplaces. This paper proposed and developed WPS that has multimedia features and network features as a wearable embedded platform. We explain the form, overall architecture, functions and user applications of this WPS. This paper also discusses the form of next generation computer platform with intuitive user interfaces and well designed applications in the future.

• Journal of the Korean Society for Precision Engineering
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• v.20 no.2
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• pp.94-103
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• 2003

In case of environment requiring safety such as human body and requiring flexible shape, a conventional mechanical actuator system does not satisfy requirements. Therefore, in order to solve these problems. a research of various smart material such as EAP (Electro Active Polymer), EAC (Electro Active Ceramic) and SMA (Shape Memory Alloy) is in progress. Recently, the highest preferring material among various smart material is EP (Electrostictive Polymer), because it has very fast response time, powerful force and large displacement. The previous researches have been studied properties of polymer and simple control, but present researches are studied a polymer actuator. An EP (Electostrictive Polymer) actuator has properties which change variably ils shape and environmental condition. Therefore, in order to coincide with a user's purpose, it is important not only to decide a shape of actuator and mechanical design but also to investigate a efficient controller. In this paper, we constructed the control logic with an adaptive fuzzy algorithm which depends on the physical properties of EP that has a dielectric constant depending on time. It caused for a sub-actuator to operate at the same time that a sub-actuator system operation increase with a functional improvement and control efficiency improvement in each actuator, hence it becomes very important to manage it effectively and to control the sub-system which Is operated effectively. There is a limitation on the management of Main-host system which has multiple sub-system, hence it brings out the Multi-Vehicle Control process that disperse the task efficiently. Controlling the multi-dispersion system efficiently, it needs the research of Main-host system's scheduling, data interchange between sub-actuators, data interchange between Main-host system and sub-actuator system, and data communication process. Therefore in this papers, we compared the fuzzy controller with the adaptive fuzzy controller. also, we applied the scheduling method for efficient multi-control in EP Actuator and the algorithm with interchanging data, protocol design.

• Journal of the Korea Society of Computer and Information
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• v.17 no.9
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• pp.103-112
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• 2012

Recently, the infrastructure to be connected to the internet is much provided, there is more and more need to connect electric or electronic products to the internet to monitor or control them remotely. However, most of the existing products lack the network interface, so it was very inconvenient to be connected to the internet. Therefore, this article designs and realizes the internet outlet allowing real-time scheduling that can control the power remotely on the internet by using the hardware TCP/IP processor. The realized product consumes low production cost because it can be realized by using the hardware TCP/IP processor and the 8-bit small microprocessor. In addition, the product can be used widely in both wired and wireless environments with a variety of user interface, including the dedicated control program which provides the environment configuration functions; embedded web service that enables the webpage to be saved on the external flash memory; Android smartphone application; motion recognition control environment that uses the OpenCV computer vision library, etc.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.1
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• pp.74-81
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• 2003

In this study, we'd implemented a real time embedded speech recognition system that requires minimum memory size for speech recognition engine and DB. The word to be recognized consist of 40 commands used in a PCS phone and 10 digits. The speech data spoken by 15 male and 15 female speakers was recorded and analyzed by short time analysis method, which window size is 256. The LPC parameters of each frame were computed through Levinson-Burbin algorithm and they were transformed to Cepstrum parameters. Before the analysis, speech data should be processed by pre-emphasis that will remove the DC component in speech and emphasize high frequency band. Baum-Welch reestimation algorithm was used for the training of HMM. In test phone, we could get a recognition rate using likelihood method. We implemented an embedded system by porting the speech recognition engine on ARM core evaluation board. The overall recognition rate of this system was 95%, while the rate on 40 commands was 96% and that 10 digits was 94%.

• Journal of IKEEE
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• v.15 no.4
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• pp.345-353
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• 2011

Recently portable mobile devices such as smart-phones and notebooks have rapidly increasing demands. Those devices consume more power because they are expected to offer more complex functionality including multimedia features. For these reasons engineering efforts are changing to focus on maximizing energy efficiency within a limited battery capacity instead of increasing computational performance. In this paper, we propose a battery management system using event driven programming technique on a embedded processor. We also show that the proposed system satisfies SBS (Smart Battery Specification) v1.1. The proposed system maintains minimum code size and memory size comparing to those of RTOSs. The proposed system can be also easily incorporated in the conventional RTOSs as a form of firmware.