• Journal of KIISE:Software and Applications
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• v.34 no.8
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• pp.697-707
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• 2007

Since embedded software is very dependent for target hardware architecture, characteristics of the platform must be considered when designing the software. Furthermore, MPSoCs consists of heterogeneous hardware components that are specified in micro level. Thus mapping of embedded software for MPSoCs should be considered the characteristics. In this paper, we provide an approach to automatic mapping PIM (Platform Independent Model) of an embedded software to PSM(Platform Specific Model) for MPSoC(Multi Processor System On Chip) and verify its effectiveness with simulation. In the proposed approach, tasks are derived from an object oriented model based on the UML (Unified Modeling Language). And then the types of the derived tasks are identified. With the identified types and inter relationship between tasks, the tasks are assigned to appropriate heterogeneous hardware components. We expect that the approach improve accuracy of the assigning and concurrency of the deployed software.

• Journal of information and communication convergence engineering
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• v.11 no.1
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• pp.56-61
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• 2013

Modern integrated circuits (ICs) are becoming an integrated parts of analog, digital, and radio frequency (RF) circuits. Testing these RF circuits on a chip is an important task, not only for fabrication quality control but also for tuning RF circuit elements to fit multi-standard wireless systems. In this paper, RF test circuits suitable for embedded testing are introduced: RF power detectors, power control circuits, directional couplers, and six-port reflectometers. Various types of embedded RF power detectors are reviewed. The conventional approach and our approach for the RF power control circuits are compared. Also, embedded tunable active directional couplers are presented. Then, six-port reflectometers for embedded RF testing are introduced including a 77-GHz six-port reflectometer circuit in a 130 nm process. This circuit demonstrates successful calibrated reflection coefficient simulation results for 37 well distributed samples in a Smith chart. The details including the theory, calibration, circuit design techniques, and simulations of the 77-GHz six-port reflectometer are presented in this paper.

• ETRI Journal
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• v.34 no.1
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• pp.44-54
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• 2012

Because of the intrinsic lack of internal-system observability and controllability in highly integrated multicore processors, very restricted access is allowed for the debugging of erroneous chip behavior. Therefore, the building of an efficient debug function is an important consideration in the design of multicore processors. In this paper, we propose a flexible on-chip debug architecture that embeds a special logic supporting the debug functionality in the multicore processor. It is designed to support run-stop-type debug functions that can halt and control the execution of the multicore processor at breakpoint events and inspect the possible causes of any errors. The debug architecture consists of the following three functional components: the core debug support block, the multicore debug support block, and the debug interface and control block. By embedding this debug infrastructure, the embedded processor cores within the multicore processor can be debugged simultaneously as well as independently. The debug control is performed by employing a JTAG-based scanning operation. We apply this on-chip debug architecture to build a debugger for a prototype multicore processor and demonstrate the validity and scalability of our approach.

• Journal of Adhesion and Interface
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• v.13 no.2
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• pp.58-63
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• 2012

CFRP chip is the byproduct from carbon fiber reinforced plastic (CFRP) processing. CFRP chip is not simply a waste mainly composed of fine carbon fiber and epoxy resin. CFRP chip keeps matrix to maximize their reinforcing effect. To obtain a uniform length of carbon fiber in CFRP chip, chip was chopped ina mortar. CFRP chip should be purified to get better interface adhesion. Epoxy resin on the carbon fiber was removed by $H_2O_2$ surface etching treatment. Optimal dispersion and fabrication conditions of CFRP chip embedded in phenolic resin were determined by thermal stability for fire retardant applications. CFRP chip-phenolic composite exhibits better mechanical and thermal properties than neat phenolic resin. Surface condition of CFRP chip-phenolic composite was evaluated by static contact angle measurement. Contact angle of CFRP chip-phenolic composite was greater than neat phenolic due to heterogeneous condition of fine carbon fibers. From the evaluation for fire retardant (ASTM D635-06) test, thermal stability of CFRP chip-phenolic composite was found to be improved with higher concentration of CFRP chip.

• Journal of Information Processing Systems
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• v.3 no.1
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• pp.16-20
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• 2007

This paper describes the development of the sensor interface and driver program for a point of care (POC) device. The proposed pac device comprises an ARM9 embedded processor and eight-channel sensor input to measure various bio-signals. It features a user-friendly interface using a full-color TFT-LCD and touch-screen, and a bluetooth wireless communication module. The proposed device is based on the system on a programmable chip (SOPC). We use Altera's Excalibur device, which has an ARM9 and FPGA area on a chip, as a test bed for the development of interface hardware and driver software.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.85-95
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• 2015

Network-on-chip (NoC) has evolved to overcome the issues of traditional bus-based on-chip interconnect. In NoC-reuse as TAM, the test schedulers are constrained with the topological position of cores and test access points, which may negatively affect the test time. This paper presents a scalable hybrid test data transportation scheme that allows to simultaneously test multiple heterogeneous cores of NoC-based SoCs, while reusing NoC as TAM. In the proposed test scheme, single test stimuli set of multiple CUTs is embedded into each flit of the test stimuli packets and those packets are multicast to the targeted CUTs. However, the test response packets of each CUT are unicast towards the tester. To reduce network load, a flit is filled with maximum possible test response sets before unicasting towards the tester. With the aid of Verilog and analytical simulations, the proposed scheme is proved effective and the results are compared with some recent techniques.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.102-105
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• 2000

A simple digital control system has been developed for the frequency stabilization of an internal mirror He-Ne laser. The system is based on one chip microprocessor with embedded Basic interpreter. To stabilize the laser output frequency, the signal such as power difference or beat frequency between two modes is supplied and processed by a microprocessor, and control signal is fed to the heating coil would round the laser tube for adjusting the spacing of the laser cavity mirror. Newly developed frequency stabilization system is totally digitized. The system and the frequency stability performance are briefly described.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.8
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• pp.578-584
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• 2004

The CSVM(Current Support Vector Machine) that is a digital architecture performing all phases of recognition process including kernel computing, learning, and recall of SVM(Support Vector Machine) on a chip is proposed. Concurrent operation by parallel architecture of elements generates high speed and throughput. The classification problems of bio data having high dimension are solved fast and easily using the CSVM. Quadratic programming in original SVM learning algorithm is not suitable for hardware implementation, due to its complexity and large memory consumption. Hardware-friendly SVM learning algorithms, kernel adatron and kernel perceptron, are embedded on a chip. Experiments on fixed-point algorithm having quantization error are performed and their results are compared with floating-point algorithm. CSVM implemented on FPGA chip generates fast and accurate results on high dimensional cancer data.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.388-390
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• 2004

In this paper, we performed the implementation of image transmission server system using embedded system that is for the specified object and easy to install at any places and move to wherever. Since the embedded system has lower capability than PC, we have to reduce the quantity of calculation and transmission. The image compression like JPEG, needs that the server calculates for making compressed image, makes the server carry the load. So we compresses the image at the server and transmit the codes to the clients connected, then the received codes from server are decoded and displayed at the clients. In this process to make the image compression and transmission effectively, we decrease the procedure as simple as possible to transmit the data in almost real-time. We used the Redhat linux 9.0 OS at the host PC and the target board based on embedded linux. The image sequences are obtained from the camera attached to the FPGA board with ALTERA chip. For effectiveness and avoiding some constraints, we made the device driver. Generally the image transmission server is PC, but using the embedded system as a server makes the server portable and cheaper than the system based on PC.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.1
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• pp.41-46
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• 2008

Since embedded software is sensitive to the resources and environment of target system, it should be debugged in the same environment as actual target system. However, existing tools to debug embedded software, in which access to internal signal or resources is limited, are uneconomical. In the thesis, economical and practical JTAG Adapter that can use open GDB is suggested. It can remove existing limitations of environment implementation that have many difficulties in implementing an environment for remote debugging. Hence, the thesis provides economical interfacing environment that can debug ubiquitous embedded software inside remote system.