• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.42-42
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• 2007

In the future, electronic components will be integrated on flexible polymer substrates and then miniaturized by thin films using suitable thin film technologies. In this article, the concept of a room temperature CVD is demonstrated using $Bi_3NbO_7$ (BNO) films with a cubic fluorite structure and their structural and electrical properties were investigated in films deposited without substrate heating. Effects of substrate temperature on electrical properties of BNO films were also studied. Films deposited without substrate heating (real temperature of $50^{\circ}C$) show partially crystallized BNO single phases with grain size of approximately 6.5 nm. Their dielectric and leakage properties are comparable to those of films deposited by pulsed laser deposition at room temperature. The concept of room temperature CVD will become a new paradigm in the deposition of dielectric thin films for flexible electron device applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.264-264
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• 2007

$B_2Mg_{2/3}/Nb_{4/3}O_7\;(B_2MN)$ thin films and $Bi_{3/2}MgNb_{3/2}O_7\;(B_{1.5}MN)$ thin films were deposited as a function of various deposition temperatures on Pt/$TiO_2/SiO_2$/Si substrates by radio frequency magnetron sputtering system. Both of their thin films are shown to crystalline phase at $500^{\circ}C$, deposition temperature, using 100W RF power. The composition of them and structural micro properties are investigated by RBS spectrum and SEM, AFM. 200 nm-thick $B_2MN$ thin films were deposited at room temperature had capacitance density of $151nF/cm^2$ at 100kHz, dissipation factor of 0.003 and had capacitance density of $584nF/cm^2$ at 100kHz, dissipation factor of 0.0045 at $500^{\circ}C$ deposition temperature. Both of their dielectric constant deposited at room temperature and at $500^{\circ}C$ were each approximately 40 and 100.

• 한국재료학회지
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• 제18권10호
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• pp.542-546
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• 2008

$BaTiO_3$/epoxy composites can be applied as the dielectric materials for embedded capacitors. The effects of the degree of $BaTiO_3$ particle agglomeration on the dielectric properties of $BaTiO_3$/epoxy composites were investigated in the present study. The degree of particle agglomeration was controlled by the milling of the agglomerated particles. The size and content of the agglomerated $BaTiO_3$ particles decreased with an increase in the milling time. The dielectric constants and polarizations of $BaTiO_3$/epoxy composites abruptly decreased with the increase of the milling time. It was concluded that the dielectric constants and polarizations of $BaTiO_3$/epoxy composites decreased as the degree of particle agglomeration decreased. The degree of agglomeration of $BaTiO_3$ particles turned out to be a very influential factor on the dielectric properties of $BaTiO_3$/epoxy composites.

• 마이크로전자및패키징학회지
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• 제6권4호
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• pp.1-7
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• 1999

MCM-D 기판에 수동소자를 내장시키는 공정을 개발하였다. MCM-D 기판은 Cu/감광성 BCB를 각각 금속배선 및 절연막 재료로 사용하였고, 금속배선은 Ti/cu를 각각 1000$\AA$/3000$\AA$으로 스퍼터한 후 fountain 방식으로 전기 도금하여 3 um Cu를 형성하였으며, BCB 층에 신뢰성있는 비아형성을 위하여 BCB의 공정특성과 $C_2F_6$를 사용한 플라즈마 cleaning영향을 AES로 분석하였다. 이 실험에서 제작한 MCM-D 기판은 절연막과 금속배선 층이 각각 5개, 4개 층으로 구성되는데 저항은 2번째 절연막 위에 thermal evaporator 방식으로 NiCr을 600$\AA$증착하여 시트저항이 21 $\Omega$/sq가 되게 형성하였고. 인덕터는 coplanar 구조로 3, 4번째 금속배선층에 형성하였으며, 커패시터는 절연막으로 PECVD $Si_3N_4$를 900$\AA$증착한 후 1, 2번째 금속배선층에 형성하여 88nF/$\textrm {cm}^2$의 커패시턴스를 얻었다. 이 공정은 PECVD $Si_3N_4$와 thermal evaporation NiCr 공정을 이용함으로써 기존의 반도체 공정을 이용하여 MCM-D 기판에 수동소자를 안정적으로 내장시킬 수 있었다.

• 한국세라믹학회지
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• 제42권2호
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• pp.81-87
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• 2005

[ $BaTiO_3$ ]계 유전체 모재료에 대하여 $Al_{2}O_{3}$와 CaO 조성이 소량 포함된 lithium-borosilicate계 유리 프릿을 $5\~15wt\%$ 적용함으로써 LTCC용 내장 캐패시터로 적용 가능한 조성을 개발하였다. 이를 위하여 먼저, 화학적으로 안정하고 저온소성효과가 탁월한 유리 프릿 조성물을 설계하고 이를 유전체 모재료에 적용하여 저온소성특성 및 유전특성을 평가하였다. $BaTiO_3$ 세라믹스를 모재료로 하는 경우 유리 프릿을 5wt$\%$ 첨가하였을 때 $925^{\circ}C$에서 $95\%$ 정도의 상대밀도 값을 나타내었으며, 이 경우 유전율 990, 유전손실 $3.1\%$의 유전특성을 나타내었다. $(Ba,Ca)(Ti,Zr)O_3$ 세라믹스를 모재료로 하여 유리프릿을 10 wt$\%$ 첨가한 경우는 $875^{\circ}C$의 소결온도에서 상대밀도가 $95\%$ 이상이며 기공율 $0.5\%$ 이하인 소결특성을 나타내었고, 700 이상의 유전율 및 $2\%$ 내외의 유전손실 값을 가지는 것으로 측정되었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.136.2-136.2
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• 2015

반도체 제조는 chip의 성능 향상 및 단가 하락을 위해 지속적으로 pattern size가 nano size로 감소해 왔고, capacitor 용량은 증가해 왔다. 이러한 현상은 contact hole의 aspect ratio를 지속적으로 증가시킨바, 그에 따라 최적의 HARC (high aspect ratio contact)을 확보하는 적합한 dry etch process가 필수적이다. 그러나 HARC dry etch process는 많은 critical plasma properties 에 의존하는 매우 복잡한 공정이다. 따라서, critical plasma properties를 적절히 조절하여 higher aspect ratio, higher etch selectivity, tighter critical dimension control, lower P2ID과 같은 plasma characteristics을 확보하는 것이 요구된다. 현재 critical plasma properties를 제어하기 위해 다양한 plasma etching 방법이 연구 되어왔다. 이 중 plasma를 낮은 kHz의 frequency에서 on/off 하는 pulsed plasma etching technique은 nanoscale semiconductor material의 etch 특성을 효과적으로 향상 시킬 수 있다. 따라서 본 실험에서는 dual-frequency capacitive coupled plasma (DF-CCP)을 사용하여 plasma operation 동안 duty ratio와 pulse frequency와 같은 pulse parameters를 적용하여 plasma의 특성을 각각 제어함으로써 etch selectivity와 uniformity를 향상 시키고자 하였다. Selective SiO2 contact etching을 위해 top electrode에는 60 MHz pulsed RF source power를, bottom electrode에는 2MHz pulse plasma를 인가하여 synchronously pulsed dual-frequency capacitive coupled plasma (DF-CCP)에서의 plasma 특성과 dual pulsed plasma의 sync. pulsing duty ratio의 영향에 따른 etching 특성 등을 연구 진행하였다. 또한 emissive probe를 통해 전자온도, OES를 통한 radical 분석으로 critical Plasma properties를 분석하였고 SEM을 통한 etch 특성분석과 XPS를 통한 표면분석도 함께 진행하였다. 그 결과 60%의 source duty percentage와 50%의 bias duty percentage에서 가장 향상된 etch 특성을 얻을 수 있었다.

• 한국재료학회지
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• 제19권11호
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• pp.576-580
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• 2009

$BaTiO_3$/epoxy composites have been widely investigated as promising materials for embedded capacitors in printed circuit boards. It is generally known that the dielectric constant (K) of the $BaTiO_3$/epoxy composites increases with improvement of the dispersion of $BaTiO_3$ particles in the epoxy matrix that comes from adding surfactant. The influences of surfactant addition on the dielectric properties of the $BaTiO_3$/epoxy composites are reported in the present study. The dielectric constant of the $BaTiO_3$/epoxy composites is not significantly affected by the surfactant addition. However, the temperature coefficient of capacitance increases and the peel strength decreases as the amount of added surfactant increases. The influences of surfactant addition on the dielectric properties of the neat epoxy are also very similar to those of the $BaTiO_3$/epoxy composites. The residual surfactant in the $BaTiO_3$/epoxy composites affects the temperature coefficient of capacitance and the peel strength of the epoxy matrix, which in turn affects the temperature coefficient of capacitance and the peel strength of the $BaTiO_3$/epoxy composites.

• E2M - 전기 전자와 첨단 소재
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• 제16권9호
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• pp.64.2-65
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• 2003

A 4 nm layer of ZrOx (targeted x-2) was deposited on an interfacial layer(IL) of native oxide (SiO, t∼1.2 nm) surface on 200 mm Si wafers by a manufacturable atomic layer chemical vapor deposition technique at 30$0^{\circ}C$. Some as-deposited layers were subjected to a post-deposition, rapid thermal annealing at $700^{\circ}C$ for 5 min in flowing oxygen at atmospheric pressure. The experimental x-ray diffraction, x-ray photoelectron spectroscopy, high-resolution transmission electron microscopy, and high-resolution parallel electron energy loss spectroscopy results showed that a multiphase and heterogeneous structure evolved, which we call the Zr-O/IL/Si stack. The as-deposited Zr-O layer was amorphous $ZrO_2$-rich Zr silicate containing about 15% by volume of embedded $ZrO_2$ nanocrystals, which transformed to a glass nanoceramic (with over 90% by volume of predominantly tetragonal-$ZrO_2$(t-$ZrO_2$) and monoclinic-$ZrO_2$(m-$ZrO_2$) nanocrystals) upon annealing. The formation of disordered amorphous regions within some of the nanocrystals, as well as crystalline regions with defects, probably gave rise to lattice strains and deformations. The interfacial layer (IL) was partitioned into an upper Si $o_2$-rich Zr silicate and the lower $SiO_{x}$. The latter was sub-toichiometric and the average oxidation state increased from Si0.86$^{＋}$ in $SiO_{0.43}$ (as-deposited) to Si1.32$^{＋}$ in $SiO_{0.66}$ (annealed). This high oxygen deficiency in $SiO_{x}$ indicative of the low mobility of oxidizing specie in the Zr-O layer. The stacks were characterized for their dielectric properties in the Pt/{Zr-O/IL}/Si metal oxide-semiconductor capacitor(MOSCAP) configuration. The measured equivalent oxide thickness (EOT) was not consistent with the calculated EOT using a bilayer model of $ZrO_2$ and $SiO_2$, and the capacitance in accumulation (and therefore, EOT and kZr-O) was frequency dispersive, trends well documented in literature. This behavior is qualitatively explained in terms of the multi-layer nanostructure and nanochemistry that evolves.ves.ves.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 춘계학술회의 초록집
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• pp.21-21
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• 2010

(Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.38-38
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• 2008

무선 통신에 사용되는 기판에서 passive device는 대부분 기판 위에 개별적으로 표면 실장 되고 있으며 전체 기판면적에 80% 정도를 차지하고 있다. 따라서 기판의 소형화, 경량화를 위하여 많은 면적을 차지하는 수동소자들을 다층인쇄회로기판(multi-layer circuit board)에 내장하는 내장형 수동소자(embedded passive device) 기술이 연구되고 있다. 본 연구원에서 개발한 복합재료는 무기물 충전제 $SrTiO_3$를 사용하였으며, 열가소성 수지로는 cyclo-olefin-polymer계열의 수지를 바탕으로 제작 하였고, 유전율7~7.5이고 유전손실은 0.0045이다. 또한 $SrTiO_3$/유기물 복합재료는 공정온도가 낮고 경제적인 유기물에 높은 유전상수를 갖는 무기물이 분산되어 있는 형태이며, 우수한 유전 특성, 화학적 안정성, 저온 제조공정, 제조단가의 감소, 패키징 크기의 감소 등의 장점을 갖는다. 개발된 재료를 기반으로 Multi-layer 구조를 이용한 다양한 용량대의 capacitor를 구현 하였으며, spiral inductor 와 내장형 spiral inductor를 구현하여 다양한 용량대의 inductor를 구현 하였다. 그리고 각각의 구조에 따른 inductance와 Q factor를 분석 하였으며, Q factor가 100이상인 high Q inductor도 구현하였다. 이렇게 구현된 내장형 수동소자는 기판의 크기의 감소와 제조 단가의 절감, 최소 크기의 기판을 구현하는데 응용이 가능 할 것으로 예상 된다.