• 제목/요약/키워드: Electronics Units

검색결과 479건 처리시간 0.031초

구륜 이동 로보트의 동적 모델링과 관성측정장치를 이용한 경로추적 알고리즘에 관한 연구 (A Study on Dynamic Modeling and Path Tracking Algorithms of Wheeled Mobile Robot using Inertial Measurement Units)

  • 김기열;임호;박종국
    • 전자공학회논문지S
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    • 제35S권10호
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    • pp.64-76
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    • 1998
  • 본 논문에서 4-구륜 2-자유도 이동 로보트의 체계적인 동적 모델링과 경로설계 및 추적 알고리즘을 제안한다. 실시간에서 이동 로보트의 위치 측정을 위해 관성측정장치중의 3가지 요소를 이용한다. 이러한 장치들은 지구의 회전속도 및 중력가속도 등의 여러 요인으로 인해 초기 오차를 가진다. 그래서 초기오차 모델을 유도하고, 실제 데이터와 유도된 모델의 추정 데이터의 확률적 특성을 분석 ${\cdot}$ 비교하여 적합도를 판정하여 사용한다. 관성측정장치의 동작특성은 오차모델과 칼만 필터와 연계된 경우와 배제된 일반적인 경우와 비교한다. 모의실험 결과들은 제안된 경로설계 및 추적 알고리즘이 기존의 방식과 비교하여 보다 유용함을 입증한다.

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3D 그래픽 Geometry Engine을 위한 부동소수점 연산기의 설계 (Design of a Floating Point Unit for 3D Graphics Geometry Engine)

  • 김명환;오민석;이광엽;김원종;조한진
    • 대한전자공학회논문지SD
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    • 제42권10호
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    • pp.55-64
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    • 2005
  • 본 논문에서는 실시간 3D 가속을 효과적으로 하기 위해 기하학 처리 과정에 적합한 부동 소수점 연산기를 설계하였다. 설계한 부동 소수점 연산기는 IEEE-754 단정도 형식을 지원하도록 하여 기하학 처리에 적합하게 하였고 설계한 부동 소수점 연산기는 Xilinx-Vertex2에서 부동소수점 덧셈/곱셈기는 100 MHz, 부동소수점 NR 역수 계산기는 120 MHz, 부동 소수점 멱승기는 200 MHz, 부동 소수점 역 제곱근 연산기는 120 MHz의 동작 주파수를 각각 확인 하였다. 또한 설계된 부동소수점 연산기를 이용해 실제 기하학 프로세서를 구현하여 실제 3B 데이터 처리를 확인하였다.

마이크로 그라비어 코터를 이용한 박막 형성 기술 (Technology of thin Film Formation by Using the Micro Gravure Coater)

  • 김동수;김정수;배성우
    • 한국정밀공학회지
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    • 제30권6호
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    • pp.596-600
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    • 2013
  • We report here on the processing and manufacturing of thin film for printed electronics by micro-gravure coating system. The micro-gravure coating systems are consisted of various modules such as web and system tension controller, micro-gravure coating units, dispenser and hybrid dry units (UV, NIR, Hot air). Especially, for the optimization of system, the number of idle roller was minimized and tension isolating infeeder was included. Also, we applied four patterns circle, 45 degree, square and 35 degree for the optimizing coating thickness. The micro-gravure coating system which applied various patterns to enable continuous coating process and fast coating time compare with conventional batch coating system. In this paper, introduce of micro-gravure coating system and testing results of coating thickness (20~700nm), coating time (1~2sec) and surface roughness (3~12nm) by using micro-gravure coating system.

Effects of an Angle Droop Controller on the Performance of Distributed Generation Units with Load Uncertainty and Nonlinearity

  • Niya, M.S. Koupaei;Kargar, Abbas;Derakhshandeh, S.Y.
    • Journal of Power Electronics
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    • 제17권2호
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    • pp.551-560
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    • 2017
  • The present study proposes an angle droop controller for converter interfaced (dispatchable) distributed generation (DG) resources in the islanded mode of operation. Due to the necessity of proper real and reactive power sharing between different types of resources in microgrids and the ability of systems to respond properly to abnormal conditions (sudden load changes, load uncertainty, load current disturbances, transient conditions, etc.), it is necessary to produce appropriate references for all of the mentioned above conditions. The proposed control strategy utilizes a current controller in addition to an angle droop controller in the discrete time domain to generate appropriate responses under transient conditions. Furthermore, to reduce the harmonics caused by switching at converters' output, a LCL filter is used. In addition, a comparison is done on the effects that LCL filters and L filters have on the performance of DG units. The performance of the proposed control strategy is demonstrated for multi islanded grids with various types of loads and conditions through simulation studies in the DigSilent Power Factory software environment.

병렬프로세서를 활용한 레이더 신호의 식별 (An Identification Method of Radar Signals using Parallel Processor)

  • 김관태;주영관;박상환;전중남
    • 전자공학회논문지
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    • 제54권4호
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    • pp.75-80
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    • 2017
  • 전자전지원 시스템(Electronic Warfare Support System)은 레이더 신호의 식별을 위해 수집한 신호의 주파수, 펄스폭, 펄스반복주기(PRI, Pulse Repetition Interval)등의 정보를 분석한 후 기존의 알려진 레이더 정보와 비교한다. 기존의 연구는 두 가지 단점이 있다. 첫 번째 단점은 기존의 알려진 레이더 정보를 마지막 비교단계에서만 비교한다는 점이다. 두 번째 단점은 PRI를 계산하기 위해 많은 연산이 필요하다는 점이다. 본 논문에서는 사전에 알려진 레이더 정보를 초기단계에서 활용하여 PRI를 계산하지 않고 수집된 신호에 미리 알고 있는 레이더 신호의 존재 여부를 식별하는 방법을 제안한다.

고주파 공진형 인버터식 X-선 장치의 단시간 출력특성 비교 연구 (A Study on the Output Characteristics Comparison of High Frequency Resonant Inverter Type X-ray Generators in Short Exposure Time)

  • 정수복;이성길;임홍우;백형래
    • 전력전자학회논문지
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    • 제4권1호
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    • pp.66-72
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    • 1999
  • 본 논문은 고주파 공진형 PWM 인버터식 X-선 장치의 인버터에 단상과 3상 전파정류방식 및 PSU 전원을 연결시켰을 때 나타나는 단시간 출력특성에 대해 분석하였다. X-선의 선질은 X-선관에 입력되는 DC 전압 파형에 의존한다. DC 출력전압 파형은 DC 전압전원의 고조파 왜곡에 의해 영향을 받는다. 이러한 관전압 파형의 왜곡은 X-선 출력의 직선성, 재현성 및 출력선질을 저하시킨다. 따라서 본 논문에서는 DC 출력전압 파형과 세 가지 형식의 DC 입력전원 형식에 따른 출력선량을 비교하였고 이에 따른 실험결과를 검토하였다.

A Cascaded Modular Multilevel Inverter Topology Using Novel Series Basic Units with a Reduced Number of Power Electronic Elements

  • Barzegarkhoo, Reza;Vosoughi, Naser;Zamiri, Elyas;Kojabadi, Hossein Madadi;Chang, Liuchen
    • Journal of Power Electronics
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    • 제16권6호
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    • pp.2139-2149
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    • 2016
  • In this study, a new type of cascaded modular multilevel inverters (CMMLIs) is presented which is able to produce a considerable number of output voltage levels with a reasonable number of components. Accordingly, each series stage of the proposed CMMLI is comprised of two same basic units that are connected with each other through two unidirectional power switches without aiming any of the full H-bridge cells. In addition, since the potentiality for generating a higher number of output voltage levels in CMMLIs hinges on the magnitude of the dc voltage sources used in each series unit, in the rest of this paper, four different algorithms for determining an appropriate value for the dc sources' magnitude are also presented. In the following, a comprehensive topological analysis between some CMMLI structures reported in the literature and proposed structure along with several simulation and experimental results will be also given to validate the lucrative benefits and viability of the proposed topology.

A Wide Frequency Range LLC Resonant Controller IC with a Phase-Domain Resonance Deviation Prevention Circuit for LED Backlight Units

  • Park, YoungJun;Kim, Hongjin;Chun, Joo-Young;Lee, JooYoung;Pu, YoungGun;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.861-875
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    • 2015
  • This paper presents a wide frequency range LLC resonant controller IC for LED backlight units. In this paper a new phase-domain resonance deviation prevention circuit (RDPC), which covers a wide frequency and input voltage range, is proposed. In addition, a wide range gate clock generator and an automatic dead time generator are proposed. The chip is fabricated using 0.35 μm BCD technology. The die size is 2 x 2 mm2. The frequency of the clock generator ranges from 38 kHz to 400 kHz, and the dead time ranges from 300 ns to 2 μs. The current consumption of the LLC resonant controller IC is 4 mA for a 100 kHz operation frequency using a supply voltage of 15 V.

CXL 메모리 및 활용 소프트웨어 기술 동향 (Technology Trends in CXL Memory and Utilization Software )

  • 안후영;김선영;박유미;한우종
    • 전자통신동향분석
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    • 제39권1호
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    • pp.62-73
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    • 2024
  • Artificial intelligence relies on data-driven analysis, and the data processing performance strongly depends on factors such as memory capacity, bandwidth, and latency. Fast and large-capacity memory can be achieved by composing numerous high-performance memory units connected via high-performance interconnects, such as Compute Express Link (CXL). CXL is designed to enable efficient communication between central processing units, memory, accelerators, storage, and other computing resources. By adopting CXL, a composable computing architecture can be implemented, enabling flexible server resource configuration using a pool of computing resources. Thus, manufacturers are actively developing hardware and software solutions to support CXL. We present a survey of the latest software for CXL memory utilization and the most recent CXL memory emulation software. The former supports efficient use of CXL memory, and the latter offers a development environment that allows developers to optimize their software for the hardware architecture before commercial release of CXL memory devices. Furthermore, we review key technologies for improving the performance of both the CXL memory pool and CXL-based composable computing architecture along with various use cases.

Design of High-Performance Intra Prediction Circuit for H.264 Video Decoder

  • Yoo, Ji-Hye;Lee, Seon-Young;Cho, Kyeong-Soon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제9권4호
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    • pp.187-191
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    • 2009
  • This paper proposes a high-performance architecture of the H.264 intra prediction circuit. The proposed architecture uses the 4-input and 2-input common computation units and common registers for fast and efficient prediction operations. It avoids excessive power consumption by the efficient control of the external and internal memories. The implemented circuit based on the proposed architecture can process more than 60 HD ($1,920{\times}1,088$) image frames per second at the maximum operating frequency of 101 MHz by using 130 nm standard cell library.