• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.11
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• pp.17-23
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• 2004

The implementation and design of the wideband IFIU using aperture open loop resonator and reversed phase technique to reduce the local oscillator leakage signal was represented in this paper. The local oscillator leakage signal is generated in stage of frequency conversion, especially in frequency conversion of fully digital modulation signal close to DC signal. The leakage signal and spurious signals, which have effects on adjacent channel or in-band channel as interference signals, were reduced below -60 dBc for 45 Mbps and 155 Mbps IF interface units. The group delay for both IFIUs shows low ripple characteristics of 15 ns and 8 ns, respectively. Also, the amplitude ripple characteristic in 150 MHz bandwidth with L-band center frequency satisfies the required specification of 2 dB. The implemented IFIU provides the required specifications for wideband satellite communication system.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.5 s.335
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• pp.29-38
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• 2005

In this paper, a new modified and optimized AntNet algorithm which can be implemented efficiently onto network processor is proposed. The AntNet that mimics the activities of the social insect is an adaptive agent-based routing algorithm. This method requires a complex arithmetic calculating system. However, since network processors have simple arithmetic units for a packet processing, it is very difficult to implement the original AntNet algorithm on network processors. Therefore, the proposed AntNet algorithm is a solution of this problem by decreasing arithmetic executing cycles for calculating a reinforcement value without loss of the adaptive performance. The results of the simulations show that the proposed algorithm is more suitable and efficient than the original AntNet algorithm for commercial network processors.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.2
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• pp.18-25
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• 2008

The traditional a roaches to software development, such as XP, UP, CBD and other CASE tools, are useful for constructing various software components. However, they are not designed to face the challenges of open environments that focus on service. The Service-Oriented Architecture(SOA) is a component architecture that interconnects an application's different functional units, called services. SOA provides a good way to integrate the business process through well-defined interfaces and contracts between business services. In this paper, we propose a method of business process modeling based on SOA with a P2P approach. Also, A P2P business process modeling system is presented. This, results in admitting the reality of enterprise that changes on the basis of services, and suggests more efficient and visual direction for the process integration between enterprises.

• Journal of Mechanical Science and Technology
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• v.17 no.10
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• pp.1507-1519
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• 2003

The two-phase flow patterns for both non-loop and loop type oscillating capillary tube heat pipes (OCHPs) were presented in this study. The detailed flow patterns were recorded by a high-speed digital camera for each experimental condition to understand exactly the operation mechanism of the OCHP. The design and operation conditions of the OCHP such as turn number, working fluid, and heat flux were varied. The experimental results showed that the representative flow pattern in the evaporating section of the OCHP was the oscillation of liquid slugs and vapor plugs based on the generation and growth of bubbles by nucleate boiling. As the oscillation of liquid slugs and vapor plugs was very speedy, the flow pattern changed from the capillary slug flow to a pseudo slug flow near the annular flow. The flow of short vapor-liquid slug-train units was the flow pattern in the adiabatic section. In the condensing section, it was the oscillation of liquid slugs and vapor plugs and the circulation of working fluid. The oscillation flow in the loop type OCHP was more active than that in the non-loop type OCHP due to the circulation of working fluid in the OCHP. When the turn number of the OCHP was increased, the oscillation and circulation of working fluid was more active as well as forming the oscillation wave of long liquid slugs and vapor plugs in the OCHP. The oscillation flow of R-142b as the working fluid was more active than that of ethanol and the high efficiency of the heat transfer performance of R -142b was achieved.

• Journal of Advanced Navigation Technology
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• v.13 no.3
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• pp.319-326
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• 2009

In this paper, the key technologies of Navigation receiver for GNSS sensor station are presented as a development result of a GNSS ground station in ETRI. A wide-band antenna and RF/IF components and SW signal processing unit to cover the GPS and Galileo signals for GNSS receiver are developed and its performance is verified by using GPS live signal and GNSS RF signal simulator from SpirentTM. We also gather GIOVE-A signal by using H/W antenna and RF/IF units in IF-level as sampling frequency and bit number, 112MHz and 8bits, respectively by using the developed wide-band antenna and RF/IF components. Data acquisition is done by using commercial data acquisition device from National Instrument TM. The gathered data is fed into SW receiver to process Galileo E1 to verify Galileo signal processing by Galileo live signal from GIOVE-A.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.4
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• pp.332-338
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• 2002

High current coil power supply for superconductivity coil of tokamak requires fast dynamics performance of di/dt and smooth change over of current direction. To meet the specification high performance DSP-based controller Is designed for 12-pulse thyristor dual converter with interphase transformer(IPT). Not only the total current of Y and $\Delta$ converter units but also the difference for those should be regulated fast and accurately. Proportional and integral controller is designed for current difference control and the controller output is compensated to $\Delta$ converter. The source voltage phase angle detection and gate pulse generation algorithm are implemented in software for higher reliability of current control. The current error Is reduced by selection of appropriate initial gating angle during the transient of change over of current direction between thyristor converters.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.37 no.1
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• pp.32-42
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• 2000

This paper presents an on-line learning algorithm for sequential construction of generalized radial basis function networks (GRBFNs) to model nonlinear systems from empirical data. The GRBFN, an extended from of standard radial basis function (RBF) networks with constant weights, is an architecture capable of representing nonlinear systems by smoothly integrating local linear models. The proposed learning algorithm has a two-stage learning scheme that performs both structure learning and parameter learning. The structure learning stage constructs the GRBFN model using two construction criteria, based on both training error criterion and Mahalanobis distance criterion, to assign new hidden units and the linear local models for given empirical training data. In the parameter learning stage the network parameters are updated using the gradient descent rule. To evaluate the modeling performance of the proposed algorithm, simulations and their results applied to two well-known benchmarks are discussed.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.3
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• pp.6-12
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• 2011

Electric vehicles and robots are real-time distributed control systems composed of multiple drive subsystems using micro controller units. Each control subsystem should be modular, compact, power saving, interoperable and fault tolerable in order to be incorporated into the networked real-time distributed control system. Under the networked real-time distributed control the synchronization problem can be occurred to the position and orientation tracking control due to the load variance, mismatch and time delay between the multiple drive subsystems. This paper suggests two types of position synchronization control of the single link manipulators. One of them is composed of cross controller, Kalman filter and disturbance observer, and the other uses the generation of target trajectories to minimize the gradient vector of the scalar function which is composed of the sum of square errors between the reference input vector and the output vectors. The availability of the proposed control schemes is shown through the control experiments.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.56-70
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• 2010

Rendering technique generating 2 dimensional image to give reality and high performance graphical processor for efficient processing of massive data are necessary to support realistic 3 dimensional graphical image. Recently, graphical hardwares have evolved rapidly. This enables high quality rendering effect that we were unable to process in realtime. Improving shading technique enabled us to render realistic images but still much time is required for this process. Multiple operational units are being integrated in a graphical processor for effective floating point operation using massive data to process almost real looking images. In this paper, we have designed and implemented a special functional unit to support high quality 3 dimensional computer graphic image on programmable integrated shader processor. We have done evaluation through functional level simulation of designed special functional unit. Hardware resource usage rate and execution speed are measured implementing directly on FPGA Virtex-4(xc4vlx200).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.12
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• pp.67-74
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• 2004

AES is frequently used as a symmetric cryptography algorithm for the Internet. Wireless embedded systems increasingly use more conventional wired network protocols. Hence, it is important to have low-cost implementations of AES for thor The basic architecture of AES unrolls oかy one full cipher round which uses 20 S-boxes together with the key scheduler and the algorithm repeatedly executes it. To reduce the implementation cost further, the folded architecture which uses only eight S-box units was studied in the recent years. In this paper, we will study a low-cost AES implementation for wireless communication technology based on the folded architecture. We first improve the folded architecture to avoid the sixteen bytes of additional state memory. Then, we implemented a single byte architecture where only one S-box unit is used for data encryption and key scheduling. It takes 352 clocks to finish a complete encryption. We found that the maximum clock frequency of its FPGA implementation reaches about 40 MHz. It can achieve about 13 Mbps which is enough for 3G wireless communication technology.