• Proceedings of the KIEE Conference
• /
• 1988.07a
• /
• pp.574-578
• /
• 1988

This paper proposes testable design method of Domino CMOS NOR-NOR Array Logic design method. Previous Domino CMOS PLA method is composed of 2 level NAND-NAND Logic. Because NOR-NOR Logic is realized by a parallel circuit, this method can prevent delay time each level and DNOR-PLA include testable circuit system that DNOR-PLA circuit. DNOR-PLA testable algorithm is realized on Prime (Primos) in Pascal language and DNOR-PLA circuit is simulated by PSPICE.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.5 no.2
• /
• pp.158-163
• /
• 2010

In this paper, we implemened the simplified Chua's circuit which is replace L to C by real hardware implementation. Because L element has a difficult problem to make a real hardware, L has a saturation characteristic and we also compare with previous Chua's circuit as the result of chaostic attractors creation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.1
• /
• pp.13-17
• /
• 2013

In this paper, we designed a charge pump circuit using level shifter for LED driver IC. The designed circuit makes the 15 V output voltage from the 5 V input in condition of 50 kHz switching frequency. The prototype chip which include the proposed charge pump circuit and its several internal sub-blocks such as oscillator, level shifter was fabricated using a 0.35 um 20 V BCD process technology. The size of the fabricated prototype chip is 2,350 um ${\times}$ 2,350 um. We examined performances of the fabricated chip and compared its measured results with SPICE simulation data.

• Proceedings of the Korean Institute of Intelligent Systems Conference
• /
• 1993.06a
• /
• pp.968-971
• /
• 1993

Fuzzy inference system which inferences and processes the Fuzzy information is designed using digital voltage mode neural circuits. The digital fuzzification circuit is designed to MIN,MAX circuit using CMOS neural comparator. A new defuzzification method which uses the center of area of the resultant fuzzy set as a defuzzified output is suggested. The method of the center of area(C. O. A) search for a crisp value which is correspond to a half of the area enclosed with inferenced membership function. The center of area defuzzification circuit is proposed. It is a simple circuit without divider and multiflier. The proposed circuits are verified by implementing with conventional digital chips.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.478-479
• /
• 2007

Many electrical fires are occurred by leakage currents and sparks generated by a short circuit. Earth leakage circuit breakers (ELCBs) should be tripped at the moment of the faults mentioned above. In this paper, we described the tripping characteristics of ELCBs against parallel arcing faults. A diesel engine generator with the capacity of 375 kVA source was adopted to provide enough large current when a parallel arcing occurred. The experimental results showed that most ELCBs we experimented were not tripped against short-duration pulse currents produced by parallel arcing because the ELCBs are designed to be tripped by a large current with long duration similar to power frequency.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.65 no.8
• /
• pp.1355-1361
• /
• 2016

The inter-turn fault (ITF) causes the negative sequence components in the d -q voltage equation due to an increase in the unbalance of three-phase input currents. For this reason, d -q voltage equation become complicate as the voltage equation is classified into positive and negative components. In this study, we propose a simplified d -q equivalent circuit of an interior permanent magnet synchronous motor under ITF state. First, we proposed modeling method for d -q current based on the finite element method simulation results. Then, we developed the simplified d -q equivalent circuit by applying the proposed d -q current modeling.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07a
• /
• pp.154-157
• /
• 2004

With the need of high-speed and mass data transmission, optical communication system requires the growth of optical components. Waveguide photodiodes(WGPDs) are introduced and circuit models of WGPD and submodule are required for the optical receiver application. In this paper, the circuit models of WGPD and submodule are investigated and modeling results are derived by PEEC methodology. The s-parameters are measured for the test structures of WGPD and submodule and the equivalent circuit models are examined. The modeling results agreed well with the measured data and can present a reasonable physical representation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07a
• /
• pp.188-191
• /
• 2004

We have investigated equivalent-circuit analysis of organic light-emitting diodes in $ITO/TPD/Alq_3/Al$. Complex impedance Z of the device was measured in the frequency range of $40Hz{\sim}1MHz$. We are able to interpret the frequency-dependent response in terms of equivalent-circuit model of contact resistance $R_s$ in series with two parallel combination of $R_{TPD},\;C_{TPD}\;and\;R_{Alq3},\;C_{Alq3}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.06a
• /
• pp.501-502
• /
• 2006

In this paper, new and aging sample of MCCB and ELCB are investigated the main performance test such as short circuit test, mechanical and electrical endurance test, dielectric test and surge current test. The surface conditions of new and aging sample are analyzed by SEM, TGA and DSC. The ELCB occurred badness mainly in short circuit test and surge current test. The badness cause of short circuit test was confirmed due to imperfect contact of contact part.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.24 no.3
• /
• pp.181-190
• /
• 2019

Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.