• Title/Summary/Keyword: Electronic and Processing Set

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A Studyu on the Waveguide Running Condition Inspection of Radar (레이다 도파관의 작동상태점검법에 관한 연구)

  • 류대근
    • Journal of the Korean Institute of Navigation
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    • v.5 no.2
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    • pp.41-47
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    • 1981
  • Many new radar techniques have appeared on the electronic scene in recent years, such as a variety of automatic computer processing. However, even with the advent of these sophisticated radar techniques, an old problem continues to plague all radars: the problem of transmission line losses. With the higher performance required today, the Waveguide testing and trouble-shooting techniques remain essentially unchanged in principle. This paper dealt with the rf pulse "Time-domain Reflectometry" to inspect radar wave-guide system and compared with the conventional methods. During the investigation, it was verified that the pulsed TDR for wave-guide is superior to the conventional methods; 1. Disassembling is not needed to locate the discontinity points and measure the reflections of trobled points. 2. The results of the data are more precise. 3. The condition of individual component is able to the photographed and recorded permanently. 4. Since rf pulse TDR is based on the well-known basic radar principle, such a test set requires the minimum of training to operate. With the level of transmission line problems, the prospect of increasing complexity of equipment, and no relief in sight, the benifits must be emphasizied to adopt such a testing procedure.procedure.

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Investigation of Small MPU Design and its Pipelining by Research CAD Tools (연구용 CAD툴에 의한 소형 MPU의 설계 및 파이프라인화의 고찰)

  • Lee, Su-Jeong;Park, Do-Sun;Song, Nak-Yun
    • The Transactions of the Korea Information Processing Society
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    • v.1 no.4
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    • pp.517-530
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    • 1994
  • In this paper, design of small microprocessor unit is implemented using research purpose VHDL and CAD tools by top-down design method. For this, original basic MPU and its pipelining architectures are suggested. Once, design target, instruction sets, architecture are decided, the operation is confirmed by C language simulation, and then the operation is confirmed by checking internal register contents for given inputs in the case of VHDL simulation. Then, design layouts are made by full/semi-custom design methods by research CAD tools and related simulation is implemented. The feasibility of suggested pipelined structure for performance improvement is confirmed by simulation, and related problems and future research directions are discussed. In conclusion, the MPU design methodology is set up and the design change of architecture is possible by this paper.

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Design of 10bit gamma line system with small size of gate count and 4bit error(LSB) to implement non-linear gamma curve (비선형 감마 커브 구현을 위한 작은 크기와 4bit(LSB) 오차를 가진 10비트 감마 라인 시스템의 설계)

  • Jang, Won-Woo;Kim, Hyun-Sik;Lee, Sung-Mok;Kim, In-Kyu;Kang, Bong-Soon
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2005.11a
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    • pp.353-356
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    • 2005
  • In this paper, the proposed $gamma({\gamma})$ line system is developed for reducing the error between non-linear gamma curve produced by a formula and result produced by hardware implementation. The proposed algorithm and system is based on the specific gamma value 2.2, namely the formula is represented by {0,1}$^{2.2}$ and the bit width of input and out data is 10bit. In order to reduce the error, the system is using least squares polynomial of the numerical method which is calculating the best fitting polynomial through a set of points. The proposed gamma line is consisting of nine kinds of quadratic equations, each with their own overlap sections to get more precise. Based on the algorithm verified by $MATLAB^{TM}$ 7.0, the proposed system is implemented by using Verilog-HDL. The proposed system has 2 clock latency; 1 result per clock. The error range (LSB) is -4 and +3. Its standard deviation is 1.287956238. The total gate count of system is 2,083 gates and the maximum timing is 15.56[ns].

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Implementation of An Automatic Program Generator for Transforming CASE Data Format into CDIF Format (CASE 자료 형식으로부터 CDIF 형식으로 변환하는 프로그램 자동 생성기의 구현)

  • Bae, Sang-Hyun;Nam, Young-Kwang;Shin, Gyu-Sang
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.12
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    • pp.3840-3847
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    • 2000
  • Electronic Industries Association has set a standard format called CDIF(CASE Data Interchange Format) for exchanging information between CASE tools from 1991. If data used on a CASE tool is represented in CDIF format, then any other CASE tools can use the data by translating CDlF format into their own format. In order to do so, each CASE vendor must provide a translator program from CDIF to its own data format or from its own data to CDIF format. In this thesis, we have implemented a source code generator for translating CASE data format into CDIF format only if they provide how data is stored. This automatic program generator generates CDIF statements using data format used in CASE tools, meta information about stored data and CDIF meta information. In the thesis, the automatic program generator has been implemented with Java and Oracle DBMS with JOBC interface in Sun O/S environment.

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Optimization of Spring Layout for Minimizing Twist of Sheet Metal Pins in Progressive Shearing (프로그레시브 전단 공정에서 박판 핀 비틀림 최소화를 위한 스프링 배치 최적화)

  • Song, H.K.;Shim, J.K.;Keum, Y.T.
    • Transactions of Materials Processing
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    • v.23 no.8
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    • pp.501-506
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    • 2014
  • Progressive shearing with blanking dies is commonly employed to produce large quantities of tiny sheet metal electronic parts. Sheet metal pins, which are narrow and long, that are sheared with a progressive die set are often twisted. The twist in the sheet metal pins, which usually occurs in the final shearing operation, generally decreases with increasing blank holding force. The blank holding forces in all shearing operations are not the same because of different shearing positions and areas. In the current study, the optimal layout of the springs in a progressive die set to minimize the twist of the sheet metal pin is proposed. In order to find the holding force acting on the tiny narrow blanks produced with the proposed springs during the shearing process, the equivalent area method is used in the structural analysis. The shearing of the sheet-metal pin was simulated to compute the twist angle associated with the blank holding force. The constraint condition satisfying the pre-set blank holding force from the previous shearing operations was imposed. A design of experiments (DOE) was numerically implemented by analyzing the progressive die structure and by simulating the shearing process. From the meta-model created from the experimental results and by using a quadratic response surface method (PQRSM), the optimal layout of the springs was determined. The twist of sheet metal pin associated with the optimal layout of the springs found in the current study was compared with that of an existing progressive die to obtain a minimal amount of twist.

Simulation for Injection Molding of Insulation Spacers for Gas-Insulated Switches Using Thermosetting Epoxy Resin (열경화성 에폭시를 이용한 가스 절연 개폐기용 절연 스페이서의 사출 성형 최적화 시뮬레이션)

  • Bae, Jaesung;Lee, Wonchang;Jee, Hongsub;Hong, Byungyou;Lee, Jaehyeong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.34 no.6
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    • pp.426-432
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    • 2021
  • Injection molding is used in many industrial fields such as home appliances, vehicle parts, and electronic device parts because various resins can be molded, leading to mass production of complex shapes. Generally, the empirical prediction method is used to set the initial processing conditions of injection molding. However, this approach requires a lot of cost and its presented solution is not accurate. In this paper, injection molding was simulated through the MoldflowTM in order to manufacture the spacer for gas insulated switch. Through the simulation, the flow of the resin with respect to the diameter of the inlet was analyzed. It was found that the process was possible at a higher resin temperature as the diameter of the inlet increased. In addition, through thermal analysis during injection of the resin, it was confirmed that a stagnation phenomenon occurred at the insert portion during injection molding, and the temperature of the resin was higher than that of the mold. As in this paper, if the spacer is manufactured by optimizing the injection hole and the temperature of the injection process based on simulation, it is expected that the spacer can be manufactured with high productivity.

IEEE std. 1500 based an Efficient Programmable Memory BIST (IEEE 1500 표준 기반의 효율적인 프로그램 가능한 메모리 BIST)

  • Park, Youngkyu;Choi, Inhyuk;Kang, Sungho
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.2
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    • pp.114-121
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    • 2013
  • As the weight of embedded memory within Systems-On-Chips(SoC) rapidly increases to 80-90% of the number of total transistors, the importance of testing embedded memory in SoC increases. This paper proposes IEEE std. 1500 wrapper based Programmable Memory Built-In Self-Test(PMBIST) architecture which can support various kinds of test algorithm. The proposed PMBIST guarantees high flexibility, programmability and fault coverage using not only March algorithms but also non-March algorithms such as Walking and Galloping. The PMBIST has an optimal hardware overhead by an optimum program instruction set and a smaller program memory. Furthermore, the proposed fault information processing scheme guarantees improvement of the memory yield by effectively supporting three types of the diagnostic methods for repair and diagnosis.

Wireless Processing System for Automatic Management of Dormitory (기숙사 관리 자동화를 위한 무선 관리 시스템)

  • Park, Sun-Ho;Shin, Heon-Soo;Oh, Jeong-Hoon;Lee, Hyun-Kwan;Eom, Ki-Hwan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.842-845
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    • 2008
  • This paper propose a dormitory management system based on 13.56MHz RFID system. The proposed dormitory management system consists of three parts, the RFID hardware system the middleware, and the application. RFID hardware system uses 13.56MHz frequency which is suitable for a close range. The middleware is implemented to accept the RFID hardware system values using RS-232c communication method and forward the values to the application. The application is designed to make the DB using the forwarded values, and works based on the DB. The efficacy of the proposed dormitory management system is verified by means of experiments. In the experiments, we set up the system to the dormitory of Daeduk College to show the improvement results of proposed system.

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Watermarking for Digital Hologram by a Deep Neural Network and its Training Considering the Hologram Data Characteristics (딥 뉴럴 네트워크에 의한 디지털 홀로그램의 워터마킹 및 홀로그램 데이터 특성을 고려한 학습)

  • Lee, Juwon;Lee, Jae-Eun;Seo, Young-Ho;Kim, Dong-Wook
    • Journal of Broadcast Engineering
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    • v.26 no.3
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    • pp.296-307
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    • 2021
  • A digital hologram (DH) is an ultra-high value-added video content that includes 3D information in 2D data. Therefore, its intellectual property rights must be protected for its distribution. For this, this paper proposes a watermarking method of DH using a deep neural network. This method is a watermark (WM) invisibility, attack robustness, and blind watermarking method that does not use host information in WM extraction. The proposed network consists of four sub-networks: pre-processing for each of the host and WM, WM embedding watermark, and WM extracting watermark. This network expand the WM data to the host instead of shrinking host data to WM and concatenate it to the host to insert the WM by considering the characteristics of a DH having a strong high frequency component. In addition, in the training of this network, the difference in performance according to the data distribution property of DH is identified, and a method of selecting a training data set with the best performance in all types of DH is presented. The proposed method is tested for various types and strengths of attacks to show its performance. It also shows that this method has high practicality as it operates independently of the resolution of the host DH and WM data.

BDSS: Blockchain-based Data Sharing Scheme With Fine-grained Access Control And Permission Revocation In Medical Environment

  • Zhang, Lejun;Zou, Yanfei;Yousuf, Muhammad Hassam;Wang, Weizheng;Jin, Zilong;Su, Yansen;Kim, Seokhoon
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.16 no.5
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    • pp.1634-1652
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    • 2022
  • Due to the increasing need for data sharing in the age of big data, how to achieve data access control and implement user permission revocation in the blockchain environment becomes an urgent problem. To solve the above problems, we propose a novel blockchain-based data sharing scheme (BDSS) with fine-grained access control and permission revocation in this paper, which regards the medical environment as the application scenario. In this scheme, we separate the public part and private part of the electronic medical record (EMR). Then, we use symmetric searchable encryption (SSE) technology to encrypt these two parts separately, and use attribute-based encryption (ABE) technology to encrypt symmetric keys which used in SSE technology separately. This guarantees better fine-grained access control and makes patients to share data at ease. In addition, we design a mechanism for EMR permission grant and revocation so that hospital can verify attribute set to determine whether to grant and revoke access permission through blockchain, so it is no longer necessary for ciphertext re-encryption and key update. Finally, security analysis, security proof and performance evaluation demonstrate that the proposed scheme is safe and effective in practical applications.