• 제목/요약/키워드: Electronic Power Consumption

검색결과 797건 처리시간 0.034초

새로운 구조의 ESD 보호소자를 내장한 고속-저전압 LVDS Driver 설계 (Design of high speed-low voltage LVDS driver circuit with the novel ESD protection device)

  • 이재현;김귀동;권종기;구용서
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.731-734
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    • 2005
  • In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at the same time. Maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, we performed the layout high speed I/O interface circuit with the low triggered ESD protection device in one-chip.

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Use of Hard Mask for Finer (<10 μm) Through Silicon Vias (TSVs) Etching

  • Choi, Somang;Hong, Sang Jeen
    • Transactions on Electrical and Electronic Materials
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    • 제16권6호
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    • pp.312-316
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    • 2015
  • Through silicon via (TSV) technology holds the promise of chip-to-chip or chip-to-package interconnections for higher performance with reduced signal delay and power consumption. It includes high aspect ratio silicon etching, insulation liner deposition, and seamless metal filling. The desired etch profile should be straightforward, but high aspect ratio silicon etching is still a challenge. In this paper, we investigate the use of etch hard mask for finer TSVs etching to have clear definition of etched via pattern. Conventionally employed photoresist methods were initially evaluated as reference processes, and oxide and metal hard mask were investigated. We admit that pure metal mask is rarely employed in industry, but the etch result of metal mask support why hard mask are more realistic for finer TSV etching than conventional photoresist and oxide mask.

다결정 3C-SiC 기반으로 한 넓은 범위에서 균일한 온도 분포를 갖는 초고온용 마이크로 히터 설계 및 제작 (Design and Fabrication of microheaters based oil polycrystalline 3C-SiC with large uniform-temperature area for high temperature)

  • 정재민;정귀상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.214-215
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    • 2009
  • This paper presents the fabrication and characteristics of microheaters, built on AlN(0.1 um)/3C-SiC(1 um) suspended membranes. Pt was used as microheater and temperature sensor materials. The results of simulated are shown that AlN/3C-SiC membrane has more large uniform-temperature area than $SiO_2$/3C-SiC membrane. Resistance of temperature sensor and power consumption of microheater were measured and calculated. Pt microheater generates the heat of about $550^{\circ}C$ at 340 mW and TCR of Pt temperature sensor is about 3188 ppm/$^{\circ}C$.

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MIC-TFT의 Single, Dual Gate의 전기적 특성

  • 김재원;한재성;최병덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.135-135
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    • 2009
  • In this work we compared the electrical characteristic of single gate and dual gate in MIC-TFT. We fabricated p-channel TFTs based on MIC structure. In mobility, dual gate ($61.35cm^2/Vsec$) got a higher value than single gate ($55.96cm^2/Vsec$). In $I_{on}/I_{off}$ dual gate ($6.94{\times}10^6$) got a higher value than single gate ($1.72{\times}10^6$) too. In $I_{off}$, dual gate got a lower value than single gate. Therefore, dual gate is good and less power consumption than single gate.

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비구면 광학계를 적용한 LED 조명의 광학성능 향상에 관한 연구(I) (A Study on Optical Efficiency Improvement of LED-lighting Adopting Aspherical Optical System(I))

  • 이학석;박종락;김민재;김혜정;김정호
    • 한국전기전자재료학회논문지
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    • 제22권12호
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    • pp.1033-1038
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    • 2009
  • Recently, Light Emitting Diode (LED) has many advantages in comparison with conventional light sources; low power consumption, long lifetime, and less environmental pollution. Therefore, the use of LED is increasing rapidly. In general, however, spherical lens is used in LED-lighting which cause many problems induces by optical aberration of spherical lens; low illumination, yellow belt, unpleasant feeling in human eye. As a solution of these problem, aspherical lens can be employed. This study reported the improvement of LED-lighting performance by adopting aspherical lens. From the commercial program, $LightTools^{TM}$, the optical problem were ensured. And then, to improve these problem, optimum aspheric form was designed using Code $V^{TM}$.

Some Device Design Considerations to Enhance the Performance of DG-MOSFETs

  • Mohapatra, S.K.;Pradhan, K.P.;Sahu, P.K.
    • Transactions on Electrical and Electronic Materials
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    • 제14권6호
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    • pp.291-294
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    • 2013
  • When subjected to a change in dimensions, the device performance decreases. Multi-gate SOI devices, viz. the Double Gate MOSFET (DG-MOSFET), are expected to make inroads into integrated circuit applications previously dominated exclusively by planar MOSFETs. The primary focus of attention is how channel engineering (i.e. Graded Channel (GC)) and gate engineering (i.e. Dual Insulator (DI)) as gate oxide) creates an effect on the device performance, specifically, leakage current ($I_{off}$), on current ($I_{on}$), and DIBL. This study examines the performance of the devices, by virtue of a simulation analysis, in conjunction with N-channel DG-MOSFETs. The important parameters for improvement in circuit speed and power consumption are discussed. From the analysis, DG-DI MOSFET is the most suitable candidate for high speed switching application, simultaneously providing better performance as an amplifier.

Single Parameter Fault Identification Technique for DC Motor through Wavelet Analysis and Fuzzy Logic

  • Winston, D.Prince;Saravanan, M.
    • Journal of Electrical Engineering and Technology
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    • 제8권5호
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    • pp.1049-1055
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    • 2013
  • DC motors are widely used in industries like cement, paper manufacturing, etc., even today. Early fault identification in dc motors significantly improves its life time and reduces power consumption. Many conventional and soft computing techniques for fault identification in DC motors including a recent work using model based analysis with the help of fuzzy logic are available in literature. In this paper fuzzy logic and norm based wavelet analysis of startup transient current are proposed to identify and quantify the armature winding fault and bearing fault in DC motors, respectively. Results obtained by simulation using Matlab and Simulink are presented in this paper to validate the proposed work.

무전극 형광램프의 전자계 방사 특성 (Electromagnetic Radiation Properties of Electrodeless Fluorescent Lamps)

  • 이종찬;박대희;김광수;함훈;박성목
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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    • pp.931-934
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    • 2002
  • In recent year there have been several developments in lamp technology that promise savings in electrical power consumption and improved quality of the lighting space. Above all, the advantage of Electrodeless fluorescent lamp is the removal of internal electrodes and heating filaments that are a light-limiting factor of conventional fluorescent lamps. Therefore, the life of Electrodeless fluorescent lamps is substantially higher than that of conventional fluorescent lamps and last up to 100,000 hours. In this paper, the Electromagnetic emitting properties were presented by simulation software operated at 2.65MHz and some specific conditions.

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MEMS형 RF Switch 구조물 제작 (Fabrication of MEMS Type RF Switch Structure)

  • 구찬규;김홍락;김영덕;정우철;김동수;남효덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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    • pp.809-812
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    • 2002
  • This paper presents the structures for a CPW shunt RF switch using MEMS(Micro Electro Mechanical System). Recent development in MEMS technology has made the design and fabrication of micro-mechanical switches as new switching elements. The micro-mechanical switches have low insertion loss, negligible power consumption, and good isolation compared to semiconductor switches. The fabricated structure shows an insertion loss of 2dB at 20GHz When a bias voltages of 12V is apply.

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Damascene 공정으로 제조한 $Bi_{3.25}La_{0.75}Ti_3O_{12}$ 박막 캐패시터 소자 특성 (Properties of $Bi_{3.25}La_{0.75}Ti_3O_{12}$ Thin Film Capacitors Fabricated by Damascene Process)

  • 신상헌;김남훈;이우선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.368-369
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    • 2006
  • Ferroelectric thin films have attracted much attention for applications in nonvolatile ferroelectric random access memories(NVFeRAM) from the view points of high speed operation, low power consumption, and large scale Integration[1,2]. Among the FRAM, BLT is of particular interest. as it is not only crystallized at relatively low processing temperature, but also shows highly fatigue resistance and large remanent polarization Meanwhile, these submicron ferroelectric capacitors were fabricated by a damascene process using Chemical mechanical polishing (CMP). BLT capacitors were practicable by a damascene process using CMP. The P-E hysteresis were measured under an applied bias of ${\pm}5V$ by using an RT66A measurement system. The electric properties such as I-V were determined by using HP4155A analysers.

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