• Journal of the Korea Safety Management & Science
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• v.15 no.1
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• pp.161-167
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• 2013

The purpose of this study was to assess power loss in the computer and office automation equipment and identified a way to save power consumptions through field measurement. In this study, the meaning of standby power was to consume power while waiting for the use of any electronic equipment. This standby consumption was about 11% of total power consumption even though we did not seriously realize it. Therefore, it was very important to measure accurate power consumption at the standby status of electronic equipment. In addition, it also helped to reduce potential risks of electricity associated disasters. This study proposed the way to reduce power losses through automatic turn off switches for power outlets and switches. Finally, this study can evaluate power consumption patterns that can reduce power consumptions and potential risks of power related disasters. This also can achieve the goals of sustainability that can reduce environmental impacts by lowering energy consumptions and greenhouse gas emissions.

• Journal of Korea Multimedia Society
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• v.21 no.5
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• pp.592-598
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• 2018

In wireless sensor networks where there is no centralized base station, each node has limited transmission range and the multi-hop routing for transmitting data to the destination is the one of the important technical issues. In particular, the wireless sensor network is not powered by external power source but operates by its own battery, so it is required to maximize the network life through efficient use of energy. To balance the power consumption, the residual power based adaptive power control is required in routing protocol. In this paper, we propose a routing protocol that prolongs the network lifetime by balancing the power consumption among the nodes by controlling the transmit power according to the residual power. We evaluate the proposed routing protocol using extensive simulation, and the results show that the proposed routing scheme can balance the power consumption and prolong network lifetime.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.8
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• pp.47-55
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• 2010

In this paper, a timing register architecture using demultiplexer and counter is proposed to reduce the area of the high resolution SAR type analog to digital converter. The area and digital power consumption of the conventional timing register based on the shift register is drastically increased, as the resolution is increased. On the other hand, the proposed architecture results in reduction of the area and the power consumption of the error correction logic of the SAR ADC. This chip is implemented with 0.18 um CMOS process. The area is reduced by 5.4 times and the digital power consumption is minimized compared with the conventional one. The 12 bits SAR ADC shows ENOB of 11 bits, power consumption of 2 mW, and conversion speed of 1 MSPS. The die area is $1 mm{\times}1mm$.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.545-546
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• 2008

This paper presents a low power CMOS low noise amplifier for UWB applications. To reduce the power consumption, two cascode amplifiers was stacked in DC. Designed with $0.18-{\mu}m$ CMOS technology, the proposed LNA achieves 20dB flat gain, below 3dB noise figure, and the power consumption of 5.2mW from a 1.8 V supply voltage.

• Journal of Sensor Science and Technology
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• v.26 no.3
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• pp.209-213
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• 2017

The delay-insensitive Null Convention Logic (NCL) asynchronous design as one of innovative asynchronous logic design methodologies has many advantages of inherent robustness, power consumption, and easy design reuses. However, transistor-level structures of conventional NCL gate cells have weakness of high area overhead and high power consumption. This paper proposes a new NCL gate based on power gating structure. The proposed $4{\times}4$ NCL multiplier based on power gating structure is compared to the conventional NCL $4{\times}4$ multiplier and MTNCL(Multi-Threshold NCL) $4{\times}4$ multiplier in terms of speed, power consumption, energy and size using PTM 45 nm technology.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.2 s.308
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• pp.33-39
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• 2006

This paper designed the electronic circuit part of Potable Infrared Night Vision Scope for a small size, light weight, and low power. Designed electronic circuit part is composed of an Auto Voltage Selecting Module, and a Power Supply Module. An Auto Voltage Selecting Modulo is composed of a switch, a battery, a step up voltage part, and a selecting voltage part. A Power Supply Module is composed of a high luminous sensing part, a battery voltage sensing part, a infrared illumination part, a connection sensing part, and a power control part. And this module controls the power of Image Intensifier Tube. To verify the performance of the designed electronic circuit part, we experimented the consumption power and continuous using time. Experimental results show that the designed electronic circuit part improves considerably on the performance of the AN/PVS-14. performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.16-23
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• 2010

This paper presents 6bit 250MS/s flash A/D converter which can be applied to wireless communication system. To solve the problem of large power consumption in flash A/D converter, control algorithm by input signal level is used in comparator stage. Also, input voltage range detector circuit is used in reference resistor array to minimize the dynamic power consumption in the comparator. Compared with the conventional A/D converter, the proposed A/D converter shows 4.3% increase of power consumption in analog and a seventh power consumption in digital, which leads to a half of power consumption in total. The A/D converter is implemented in a $0.18{\mu}m$ CMOS 1-poly 6-metal technology. The measured results show 106mW power dissipation with 1.8V supply voltage. It shows 4.1bit ENOB at sampling frequency 250MHz and 30.27MHz input frequency.

• ETRI Journal
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• v.27 no.5
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• pp.539-544
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• 2005

An analog CMOS vision chip for edge detection with power consumption below 20mW was designed by adopting electronic switches. An electronic switch separates the edge detection circuit into two parts; one is a logarithmic compression photocircuit, the other is a signal processing circuit for edge detection. The electronic switch controls the connection between the two circuits. When the electronic switch is OFF, it can intercept the current flow through the signal processing circuit and restrict the magnitude of the current flow below several hundred nA. The estimated power consumption of the chip, with $128{\times}128$ pixels, was below 20mW. The vision chip was designed using $0.25{\mu}m$ 1-poly 5-metal standard full custom CMOS process technology.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.212-215
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• 2016

In this paper, a 5.08 GHz Ring Voltage Controlled Oscillator(Ring VCO) was implemented using $0.18{\mu}m$ standard CMOS technology. The proposal Ring VCO is 3-stage structure. This research confirmed that the each stage's different transistor size ratio influence the current change and alter power consumption consequentially. This circuit is formed to control the current thereby adding the Current Mirror and to tune the frequency by supplying control voltage. It has an 65.5 %(1.88~5.45 GHz) tuning range. The measured output power is -0.30 dBm. The phase noise is -87.50 dBc/Hz @1 MHz offset with operating frequency of 5.08 GHz fundamental frequency. The total power consumption of Ring VCO is 31.2 mW with 2.4 V supply voltage.

• IEIE Transactions on Smart Processing and Computing
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• v.1 no.2
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• pp.117-124
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• 2012

A client collaboration (CC) system is proposed for a user relay system. The proposed scheme focuses on the management of transmit power and leakage interference. In the proposed CC system, edge users transmit signals to the masters considered as user relays. The masters relay the signals of the edge users to the base station using the resource blocks (RBs) that are assigned to the edge users. The leakage interference and power consumption were analyzed in the CC system. In addition, an optimal master location problem was formulated based on the signal-to-leakage-plus-noise ratio (SLNR). Because the optimal master location problem is quite complex, a sub-optimal master location problem was proposed and a closed-form sub-optimal master location was obtained. The edge users generate smaller leakage interference and power consumption in the proposed CC system compared to the system without the CC. The numerical results showed that the edge users generate smaller leakage interference and power consumption in the proposed CC system compared to the system without the CC, and the average throughput increases.