• Transactions on Electrical and Electronic Materials
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• v.13 no.2
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• pp.98-101
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• 2012

I studied the stability of organic photovoltaic cells in terms of P3HT:PCBM-71 blend ratio as a function of storage time. I obtained the best cell performance by optimizing the blend ratio of electron donor and electron acceptor within the active layer. In this study, I found that the more the P3HT:PCBM ratio increases within the active layer, the more the cell efficiency decreases as the storage time increases. As a result, the best optimized blend ratio was the 1:0.6 ratio of P3HT:PCBM-71, and cell efficiency of the device with the 1:0.6 blend ratio was 4.49%. The device with the best cell efficiency showed good stability.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.7-7
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• 2009

In this paper, we investigated the dependence of HCI (Hot Carrier Immunity) degradation and device performance on channel orientation in sub-micron PMOSFET. Although device performance ($I_{D.sat}$ vs. $I_{Off}$) was improved as the transistor angle increased HC immunity was degraded. Therefore, consideration of reliability characteristics as well as dc device performance is highly necessary in channel stress engineering of next generation CMOSFETs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.95-96
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• 2009

A fully depleted capacitorless 1-transistor dynamic random access memory (FD 1T-DRAM) based on a sSOI strained-silicon-on-insulator) wafer was investigated. The fabricated device showed excellent electrical characteristics of transistor such as low leakage current, low subthreshold swing, large on/off current ratio, and high electron mobility. The FD sSOI 1T-DRAM can be operated as memory device by the floating body effect when the substrate bias of -15 V is applied, and the FD sSOI 1T-DRAM showed large sensing margin and several milli seconds data retention time.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04a
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• pp.74-75
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• 2009

White light emitting device based on a red fluorescence material (5,6,11,12)-Tetraphenylnaphthacene(Rubrene) has been fabricated. The white OLED consists of it and a blue phosphorescent material FIrPic (iridum-bis(4,6,-difluorophenylpyridinato-N,C2)-picolinate) The threshold voltage is 5.3V, and the brightness reaches $1000\;cd/m^2$ at 11V, $14.5\;mA/cm^2$. The color of the light corresponds to a CIE coordinate of (0.30, 0.38). The highest efficiency of the device can reach 9.5 cd/A or 5.5 1m/W at 6V, $0.1mA/cm^2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04b
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• pp.26-30
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• 2000

In this paper, carbon and silver electrode properties of power electroluminescent device were investigated. Devices were manufactured by screen-printing and manufactured devices were measured following things with variable applied voltage; emission spectra, transferred charge density, brightness and current. A continuous test at $65 ^{\circ}C$ of temperature and 95% of humidity was operated. The brightness of devices which were made of silver and carbon electrode at 100V was $67.03cd/m^2$ and $60.02cd/m^2$ respectively. In case of device, which was made of silver electrode, a black spot was formed after 72 hours and degraded but carbon electrode was stable.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.37-38
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• 2008

In this paper, we have developed Organic light-emitting devices(OLEDs) using various thicknesses of new electron transport layer. The device structure of ITO/ 2-TNATA(15nm)/ DPVBi(40nm)/ New ETL(20nm,60nm,100nm)/ LiF(0.5nm)/Al(100nm) has been used. The operating voltage of the device was almost independent of the new ETL thickness, due to its high electron conducting property. For example, the operating voltages of the devices with 20nm and 60nm layers are almost 5V at a current density $200mA/cm^2$. The device with the new ETL shows the low turn-on of 2.5V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.2
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• pp.105-109
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• 2012

In this study, thickness vibration mode piezoelectric devices for AE sensor application were simulated using ATILA FEM program, and then fabricated. Trajectory resonant displacement and electro mechanical coupling factors of the piezoelectric devices were investigated. The simulation results showed that excellent displacement and electro mechanical coupling factor was obtained when the ratio of diameter/thickness($\Phi/T$) was 0.75. The piezoelectric device of $\Phi/T$=0.75 exhibited the optimum values of fr= 183 kHz, displacement= $4.44{\times}10^{-7}[m]$, $k_{33}$= 0.69, which were suitable for the application of AE sensor piezoelectric device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.5
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• pp.276-281
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• 2014

A high-responsive Schottky device has been achieved by forming a thin metal deposition on a Si substrate. Two-different metals of Ni and Ag were used as a Schottky metal contact with a thickness about 10 nm. The barrier height formation between metal and Si determines the rectifying current profiles. Ag-embedding Schottky device gave an extremely high response of 17,881 at a wavelength of 900 nm. An efficient design of Schottky device may applied for photoelectric devices, including photodetectors and solar cells.

• Transactions on Electrical and Electronic Materials
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• v.14 no.6
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• pp.291-294
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• 2013

When subjected to a change in dimensions, the device performance decreases. Multi-gate SOI devices, viz. the Double Gate MOSFET (DG-MOSFET), are expected to make inroads into integrated circuit applications previously dominated exclusively by planar MOSFETs. The primary focus of attention is how channel engineering (i.e. Graded Channel (GC)) and gate engineering (i.e. Dual Insulator (DI)) as gate oxide) creates an effect on the device performance, specifically, leakage current ($I_{off}$), on current ($I_{on}$), and DIBL. This study examines the performance of the devices, by virtue of a simulation analysis, in conjunction with N-channel DG-MOSFETs. The important parameters for improvement in circuit speed and power consumption are discussed. From the analysis, DG-DI MOSFET is the most suitable candidate for high speed switching application, simultaneously providing better performance as an amplifier.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.10
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• pp.720-725
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• 2013

Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have analyzed trench process, field limit ring process for fabrication of unified trench gate power MOSFET. And we have analyzed electrical characteristics of fabricated unified trench gate power MOSFET. The optimal trench process was based on SF6. After we carried out SEM measurement, we obtained superior trench gate and field limit ring process. And we compared electrical characteristics of planar and trench gate unified power MOSFET after completing device fabrication. As a result, the both of them was obtained 500 V breakdown voltage. However trench gate unified power MOSFET was shown improved Vth and on state voltage drop characteristics than planar gate unified power MOSFET.