• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.5
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• pp.621-627
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• 2011

In this paper, we analysed performance for on-wafer GaN HEMT using load-pull in X-band, and studied optimum impedance point based on analysis result. We suggested method of optimum performance device by analysis of optimum impedance for solid state device on-wafer condition before packaging. The measured device is gate length 0.25um, and gate width is 400um, 800um. device 400um is performed $P_{sat}$=33.16dBm, PAE=67.36%, Gain=15.16dBm, and device 800um is performed $P_{sat}$=35.91dBm, PAE=69.23%, Gain=14.87dBm.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.2
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• pp.81-84
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• 2014

The bipolar resistive switching characteristics of resistive random access memory (ReRAM) based on $HfO_2$ thin films have been demonstrated by using Ag/$HfO_2$/Pt structured ReRAM device. MIcrowave irradiation (MWI) treatment at low temperature was employed in device fabrication with $HfO_2$ thin films as a transition layer. Compared to the as-deposited Ag/$HfO_2$/Pt device, highly improved uniformity characteristics of resistance values and operating voltages were obtained from the MWI treatment Ag/$HfO_2$/Pt ReRAM device. In addition, a stable DC endurance (> 100 cycles) and a high data retention (> $10^4$ sec) were achieved.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.127-138
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• 2013

The impact of Empty Space layer in the channel region of a Double Gate (i.e. ESDG) MOSFET has been studied, by monitoring the DC, RF as well as the digital performance of the device using ATLAS 3D device simulator. The influence of temperature variation on different devices, i.e. Double Gate incorporating Empty Space (ESDG), Empty Space in Silicon (ESS), Double Gate (DG) and Bulk MOSFET has also been studied. The electrical performance of scaled ESDG MOSFET shows high immunity against Short Channel Effects (SCEs) and temperature variations. The present work also includes the linearity performance study in terms of $VIP_2$ and $VIP_3$. The proper bias point to get the higher linearity along with the higher transconductance and device gain has also been discussed.

• Transactions on Electrical and Electronic Materials
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• v.2 no.4
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• pp.15-18
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• 2001

A new small scaling Lateral Trench Insulated Gate Bipolar Transistor (SSLTIGBT) was proposed to improve the characteristics of the device. The entire electrode of the LTIGBT was replaced with a trench-type electrode. The LTIGBT was designed so that the width of device was no more than 10 ${\mu}{\textrm}{m}$. The latch-up current densities were improved by 4.5 and 7.6 times, respectively, compared to those of the same sized conventional LTIGBT arid the conventional LTIGBT which has the width of 17 ${\mu}{\textrm}{m}$. The enhanced latch-up capability of the SSLTIGBT was obtained due to the fact that the hole current in the device reaches the cathode via the p+ cathode layer underneath the n+ cathode layer, directly. The forward blocking voltage of the SSLTIGBT was 125 V. At the same size, those of the conventional LTIGBT and the conventional LTIGBT with the width of 17 ${\mu}{\textrm}{m}$ were 65 V and 105 V, respectively. Because the proposed device was constructed of trench-type electrodes, the electric field In the device were crowded to trench oxide. Thus, the punch through breakdown of LTEIGBT occurred late.

• Electrical & Electronic Materials
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• v.8 no.6
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• pp.727-736
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• 1995

This paper examines the characteristics and physical properties of the scaled MONOS nonvolatile memory device for low programming voltage EEPROM. The capacitor-type MONOS memory devices with the nitride thicknesses ranging from 41.angs. to 600.angs. have been fabricated. As a result, the 5V-programmable MONOS device has been obtained with a 20ms programming time by scaling the nitride thickness to 57.angs. with a tunneling oxide thickness of 19.angs. and a blocking oxide thickness of 20.angs.. Measurement results of the quasi-static C-V curves indicate, after 10$\^$6/ write/erase cycles, that the devices are degraded due to the increase of the silicon-tunneling oxide interface traps. The 10-year retention is impossible for the device with a nitride less than 129.angs.. However, the MONOS memory device with 10-year retentivity has been obtained by increasing the blocking oxide thickness to 47.angs.. Also, the memory traps such as the nitride bulk trap and the blocking oxide-nitride interface trap have been investigated by measuring the maximum flatband voltage shift and analyzing through the best fitting method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.242-242
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• 2007

무방향성 규소강판을 lamination core 형태로 제작하여 자기적 특성을 조사 하였다. 그 결과 1차, 2차 권선수가 400turns 시료에서 보자력(Hc)과 포화자속밀도(Bs)는 최대값을 나타내었고, 보자력은 0.05Oe, 포화자속밀도는 1.8T 이었다. 현재 국내에서 생산되고 있는 무방향성 규소강판의 자속밀도값 보다 더 우수한 강을 나타내었으며, 열화특성이 자기적 특성에 미치는 영향을 통해 고효율 무방항성 규소강판 개발의 가능성을 확인하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.392-393
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• 2007

In this paper, we report the characteristics inorganic EL device with high dielectric constant materials of PMN, PZT. Fabricated EL device shows stable light emission even at 20kHz -400Volt without any break down failure. Brightness voltage curve of EL device is same with typical EL. As increasing applied voltage, the brightness increased linearly. From the results of Frequency and duty ratio variation, over 50% of brightness increment was seen. Luminous efficiency was increased upto 200V range and saturated over 200V by slow increasement of light emission. We got e bright stable emission of 1733 cd/m2 at the condition of Frequency 35 KHz, Duty 10%, 400V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.90-93
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• 2000

In this study, the rise throughput and the stability in fabrication of device can be obtained by applying of CMP process to STI structure in 0.18um semiconductor device. To employ in STI CMP, the reverse moat process has been added thus the process became complex and the defects were seriously increased. Removal rates of each thin films in STI CMP was not equal hence the devices must to be effected, that is, the damage was occured in the device dimension in the case of excessive CMP process and the nitride film was remained on the device dimension in the case of insufficient CMP process than these defects affect the device characteristics. To resolve these problems, the development of slurry for CMP with high removal rate and high selectivity between each thin films was studied then it can be prevent the reasons of many defects by reasons of many defects by simplification of process that directly apply CMP process to STI structure without the reverse moat pattern process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.183-184
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• 2005

In this paper. a new small size Lateral Trench Electrode Power IGBT is proposed. The entire electrode of proposed LIGBT is placed in trench oxide. The forward blocking voltage of the proposed LIGBT is improved by 1.6 times with that of the conventional LIGBT. The forward blocking voltage of proposed LIGBT is 500V. At the same size. a increase of the forward blocking voltage of about 1.6 times relative to the conventional LIGBT is observed by using TMA-MEDICI which is used for analyzing device characteristics. Because the electrodes of the proposed device are formed in trench oxide. the electric field in the device are crowded to trench oxide. We observed that the characteristics of i the proposed device was improved by using TMA-MEDICI and that the fabrication of the proposed device is possible by using TMA-TSUPREM4.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.87-88
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• 2005

AAO(Anodic Aluminum Oxide)는 양극산화 방법을 이용하여 얻을 수 있는 알루미늄의 다공성 산화막이다. 기존의 방법에서는 DC전압을 이용하여 AAO를 성장시켰는데 본 연구에서는 AC전압을 이용하여 AAO의 성장 특성을 제어하였다. 전압원으로 DAQ를 사용하였는데 출력전압을 증폭하기 위하여 2 단 차동증폭기를 제작하였다. 실험 결과는 AAO 기판의 SEM 사진을 촬영, 분석함으로써 얻을 수 있었다. SEM 시진을 분석한 결과 pore size는 전압의 변화에 큰 영향을 받지 않음을 알 수 있었던 반면 성장 길이는 AC전압의 주기가 증가함에 따라 길어지는 성향을 확인할 수 있었다. 또한 주기와 AAO 성장 길이와의 관계를 로그스케일 그래프로 나타내보면 선형적인 특성을 나타내었다. 이를 통해 인가한 전압의 주파수에 따라 AAO의 성장 길이를 예측할 수 있었다.