• 한국소음진동공학회논문집
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• 제19권8호
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• pp.788-794
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• 2009

Various types of latch designs for hard disk drives using load/unload mechanism have been introduced to protect undesired release motions of a voice coil motor(VCM) actuator from sudden disturbances. Recently, various inertia-type latches have been widely used because locking performance is better than that of other types of latch. However there has been a limit in the inertia type in order to guarantee perfect latch and unlatch operations because of changes in latch/unlatch conditions due to mechanical tolerance and temperature-dependent friction. In this paper, a reliable and robust magnetic latch mechanism is proposed through only simple modifications of coil and yoke shapes in order to overcome the mechanical limit of current inertia-type latches. This new magnetic latch does not have only a simple structure but it also ensures reliable operations and anti-shock performance. The operating mechanism of the proposed latch is theoretically analyzed and optimally designed using an electromagnetic simulation.

• 한국기계가공학회지
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• 제14권5호
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• pp.102-106
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• 2015

In this paper, we study the optimal design for improved rotation latch system performance. The factors affecting the Torque generated in the armature were chosen as design variables. Utilizing the vertical matrix, the orthogonal array table was created to predict the results through minimal analysis. To confirm the Torque generation amount, by utilizing the commercial electromagnetic analysis software MAXWELL, finite element analysis was performed. The approximation method and experimental design through the commercial PIDO tool PIAnO for optimal design and calculations were utilized to perform experiments using an optimization method with evolutionary algorithms. Using the approximation model, design factors were determined that can maximize the torque generated in the armature, and the simulation was performed.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2004년도 추계학술대회
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• pp.468-473
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• 2004

The magnetic jack type Control Element Drive Mechanism (CEDM) had been developed and verified through electromechanical testing including the testing of the magnetic force required to lift the control element assembly. It would become inefficient in view of cost and time for parametric studies to be performed by test to improve the CEDM system. So it becomes necessary to develop a computational model to simulate the electromagnetic characteristics of the CEDM in order to improve the CEDM design efficiently. In this paper it is presented that the electromagnetic analysis using a 2D axisymmetric FEM model has been carried out to simulate the operation of the latch magnet of the CEDM to generate a current trace for latch coil. The results show the calculated current trace is very similar to the real current trace taken from the CEDM.

• 한국전기전자재료학회논문지
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• 제29권9호
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• pp.559-564
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• 2016

This study examined the malfunction mode of the HCMOS IC under narrow-band high-power electromagnetic wave. Magnetron is used to a narrow-band electromagnetic source. MFR (malfunction failure rate) was measured to investigate the HCMOS IC. In addition, we measured the resistance between specific pins of ICs, which are exposed and not exposed to the electromagnetic wave, respectively. As a test result of measurement, malfunction mode is shown in three steps. Flicker mode causing a flicker in LED connected to output pin of IC is dominant in more than 7.96 kV/m electric field. Self-reset mode causing a voltage drop to the input and output of IC during electromagnetic wave radiation is dominant in more than 9.1 kV/m electric field. Power-reset mode making a IC remained malfunction after electromagnetic radiation is dominant in more than 20.89 kV/m. As a measurement result of pin-to-pin resistance of IC, the differences between IC exposed to electromagnetic wave and normal IC were minor. However, the five in two hundred IC show a relatively low resistance. This is considered to be the result of the breakdown of pn junction when latch-up in CMOS occurred. Based on the results, the susceptibility of HCMOS IC can be applied to a basic database to IC protection and impact analysis of narrow-band high-power electromagnetic waves.

• 한국전기전자재료학회논문지
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• 제30권9호
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• pp.535-540
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• 2017

The changes in the electrical characteristics of CMOS ICs due to coupling with a narrow-band electromagnetic wave were analyzed in this study. A magnetron (3 kW, 2.45 GHz) was used as the narrow-band electromagnetic source. The DUT was a CMOS logic IC and the gate output was in the ON state. The malfunction of the ICs was confirmed by monitoring the variation of the gate output voltage. It was observed that malfunction (self-reset) and destruction of the ICs occurred as the electric field increased. To confirm the variation of electrical characteristics of the ICs due to the narrow-band electromagnetic wave, the pin-to-pin resistances (Vcc-GND, Vcc-Input1, Input1-GND) and input capacitance of the ICs were measured. The pin-to-pin resistances and input capacitance of the ICs before exposure to the narrow-band electromagnetic waves were $8.57M{\Omega}$ (Vcc-GND), $14.14M{\Omega}$ (Vcc-Input1), $18.24M{\Omega}$ (Input1-GND), and 5 pF (input capacitance). The ICs exposed to narrow-band electromagnetic waves showed mostly similar values, but some error values were observed, such as $2.5{\Omega}$, $50M{\Omega}$, or 71 pF. This is attributed to the breakdown of the pn junction when latch-up in CMOS occurred. In order to confirm surface damage of the ICs, the epoxy molding compound was removed and then studied with an optical microscope. In general, there was severe deterioration in the PCB trace. It is considered that the current density of the trace increased due to the electromagnetic wave, resulting in the deterioration of the trace. The results of this study can be applied as basic data for the analysis of the effect of narrow-band high-power electromagnetic waves on ICs.

• 한국전자파학회논문지
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• 제19권6호
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• pp.597-602
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• 2008

본 논문은 고출력 전자파에 따른 CMOS IC 소자의 피해 효과와 회복 시간을 알아보았다. 고출력 전자파 발생 장치는 마그네트론을 사용하였고, CMOS 인버터의 오동작/부동작 판별법은 유관 식별이 가능한 LED 회로로 구성하였다. 그리고 고출력 전자파에 의해 오동작된 CMOS 인버터의 전원 전류와 회복 시간을 관찰하였다. 그 결과, 전계 강도가 약 9.9 kV/m에서의 전원 전류는 정상 전류의 2.14배가 증가하였다. 이는 래치업에 의한 CMOS 인버터가 오작동된 것을 확인할 수 있었다. 또한, COMS 인버터의 파괴는 컴포넌트, 온칩와이어, 그리고 본딩 와이어에서 다른 형태로 관찰하였다 위 실험 결과로, 전자 장비의 고출력 전자파 장해에 대한 이해를 돕는데 기초 자료로 활용될 것으로 예측된다.