• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1315-1317
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• 1998

We have investigated the effects of electrical stress on poly-Si TFTs with different hydrogen passivation conditions. The amounts of threshold voltage shift of hydrogen passivated poly-Si TFTs are much larger than those of as-fabricated devices both under the gate bias stressing and under the gate and drain bias stressing. Also, we have quantitatively analized the degradation phenomena using by analytical method. we have suggested that the electron trapping in the gate dielectric is the dominant degradation mechanism in only gate bias stressed poly-Si TFT while the creation of defects in the poly-Si is prevalent in gate and drain bias stressed device.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1502-1504
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• 1996

The effects of electrical stress in hydrogen passivated and as-fabricated poly-Si TFT's are investigated. It is observed that the charge trapping in the gate dielectric is the dominant degradation mechanism in poly-Si TFT's which has been stressed by the gate bias alone while the creation of defects in the poly-Si film is prevalent in gate and drain bias stressed devices. The degradation due to the gate bias stress is dramatically reduced with hydrogenation time while the degradation due to the gate and drain bias stress is increased a little. From the experimental results, it is considered that hydrogenation suppress the charge trapping at gate dielectrics as well as improve the characteristics of poly-Si TFT's.

• Journal of Information Display
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• 제11권2호
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• pp.91-93
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• 2010

The shearing effects on the electro-optical properties of a stressed cholesteric liquid crystal were investigated. A photopolymer was dispersed in the cholesteric liquid crystal cell. By carefully choosing the mixing ratio between the liquid crystal and the photoreactive monomer, and by applying suitable mechanical shearing on the substrates, a cholesteric liquid crystal display with a low threshold voltage and no alignment layer was demonstrated.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권5호
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• pp.367-372
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• 1999

We have investigated the effects of electrical stress on poly-Si TFTs with different hydrogen passivation conditions. The amounts of threshod voltage shift of hydrogen passivated poly-Si TFTs are much larger than those of as-fabricated devices both under the gate only and the gate and drain bias stressing. Also, we have quantitatively analyzed the degradation phenomena by analytical method. We have suggested that the electron trapping in the gate dielectric is the dominant degradation mechanism in only gate bias stressed poly-Si TFT while the creation of defects in the channel region and $poly-Si/SiO_2$ interface is prevalent in gate and drain bias stressed device.

• E2M - 전기 전자와 첨단 소재
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• 제11권10호
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• pp.94-99
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• 1998

Suitable replacement materials for ultrathin SiO2 in deeply scaled MOSFETs such as lattice polarizable films, which have much higherpermittivities than SiO2, have bandgaps of only 3.0 to 4.0 eV. Due to these small bandgaps, the reliability of these films as a gate insulator is a serious concern. Ramped voltage, time dependent dielectric breakdown, and hot carrier effect measurements were done on 190 layers of TiO2 which were deposited through the metal-organic chemical vapor deposition of titanium tetrakis-isopropoxide (TTIP). Measurements of the high and low frequency capacitance indicate that virtually no interface state are created during constant current injection stress. The increase in leakage upon electrical stress suggests that uncharged, near-interface states may be created in the TiO2 film near the SiO2 interfacial layer that allow a tunneling current component at low bias.

• 대한전기학회논문지
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• 제36권11호
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• pp.796-805
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• 1987

The flashover voltages have been investigated for spacer and unbridged-gap in SF6-N2 gas mixtures up to the value of 760(torr. cm), The gap was stressed by DC source The results obtained are as follows` 1) The flashover voltages for an unbridged gap and for a spacer in SF6, N2 and SF6-N2 gas mixtures follow the Paschen's curve. 2) The polarity effects was not observed in both unbridged gap and a spacer which had per ect contact with an electrode. The flashover voltages for negative polatity are lower than those for positive polarity in case of imperfect contact. 3) 3%flashover voltage is decreased by putting a spacer which had perfect contact with an electrode. The spacer which has a gap void shows the lowest flashover voltage. 4) The lowest spacer efficiency was obtained with higher gas pressure & large amount of N2 content. The flashover voltages depend on the gas pressure rather than the spacer efficienty at low value of pd. 5) The flashover voltages of gas mixtures of N2 with SF6 are relatively high, even though the amount of SF6 gas content is small.

• Asian-Australasian Journal of Animal Sciences
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• 제29권5호
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• pp.731-738
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• 2016

Glucagon-like peptide-2 (GLP-2) is important for intestinal barrier function and regulation of tight junction (TJ) proteins, but the intracellular mechanisms of action remain undefined. The purpose of this research was to determine the protective effect of GLP-2 mediated TJ and transepithelial electrical resistance (TER) in lipopolysaccharide (LPS) stressed IPEC-J2 cells and to test the hypothesis that GLP-2 regulate TJ and TER through the phosphatidylinositol 3-kinase (PI3K)-protein kinase B (Akt)-mammalian target of rapamycin (mTOR) signaling pathway in IPEC-J2 cells. Wortmannin and LY294002 are specific inhibitors of PI3K. The results showed that $100{\mu}g/mL$ LPS stress decreased TER and TJ proteins occludin, claudin-1 and zonula occludens protein 1 (ZO-1) mRNA, proteins expressions (p<0.01) respectively. GLP-2 (100 nmol/L) promote TER and TJ proteins occludin, claudin-1, and zo-1 mRNA, proteins expressions in LPS stressed and normal IPEC-J2 cells (p<0.01) respectively. In normal cells, both wortmannin and LY294002, PI3K inhibitors, prevented the mRNA and protein expressions of Akt and mTOR increase induced by GLP-2 (p<0.01) following with the significant decreasing of occludin, claudin-1, ZO-1 mRNA and proteins expressions and TER (p<0.01). In conclusion, these results indicated that GLP-2 can promote TJ's expression and TER in LPS stressed and normal IPEC-J2 cells and GLP-2 could regulate TJ and TER through the PI3K/Akt/mTOR pathway.

• 반도체디스플레이기술학회지
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• 제20권2호
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• pp.131-136
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• 2021

EtherCAT is an Ethernet-based fieldbus system standardized in IEC 61158 and SEMI, and widely used in the fields of factory automation, semiconductor equipment and robotics. In this paper, a real-time EtherCAT master is implemented on Linux operating systems and its performances are evaluated. To enhance the real-time capability of mainline Linux kernel, Xenomai is applied as a real-time framework and an open source EtherCAT master stack, Simple Open EtherCAT Master (SOEM), is installed on it. Unlike other studies, the real-time performance of the EtherCAT master is evaluated at the output of the network interface card, so that the evaluation results include all possible effects from the EtherCAT master system. The implemented EtherCAT master can send and receive packets up to 20KHz control frequency with low jitter, even in stressed condition.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권6호
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• pp.436-441
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• 1999

Joule heating effect in EM(Electromigration) test were performed on a bend test structure. EM test is done under high current densities(1.0-2.5MA/cm2), which leads to joule heating. Since joule heating is added to the controlled oven(stress) temperature, themetal line temperature is higher than the stress temperature. The increase in the stress temperature due to joule heating is important because EM phenomena and metal line failure are related to the stress temperature. In this paper, metal line was stressed with a current density of 1.0 MA/$cm^2$, 1.5MA/$cm^2$, 2.0MA/$cm^2$, 2.5MA/$cm^2$, for 1200 sec and temperature increase due to joule heating was less than $10^{\circ}C$. Also it took 30 minutes for the metal line to equalized with oven temperature. Recommendations are given for the EM test to determine the initial resistance of EM test structure under stress temperature and current density.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권12호
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• pp.761-767
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• 1999

Poly-Si TFTs(polycrystalline silicon thin film transistors) fabricated on a low cost glass substrate have attracted a considerable amount of attention for pixel elements and peripheral driving circuits in AMLCS(active matrix liquid crystal display). In order to apply poly-Si TFTs for high resolution AMLCD, a high operating frequency and reliable circuit performances are desired. A new poly-Si TFT with CLBT(counter doped lateral body terminal) is proposed and fabricated to suppress kink effects and to improve the device stability. And this proposed device with BC(buried channel) is fabricated to increase ON-current and operating frequency. Although the troublesome LDD structure is not used in the proposed device, a low OFF-current is successfully obtained by removing the minority carrier through the CLBT. We have measured the dynamic properties of the poly-Si TFT device and its circuit. The reliability of the TFTs and their circuits after AC stress are also discussed in our paper. Our experimental results show that the BC enables the device to have high mobility and switching frequency (33MHz at $V_{DD}$ = 15 V). The minority carrier elimination of the CLBT suppresses kink effects and makes for superb dynamic reliability of the CMOS circuit. We have analyzed the mechanism in order to see why the ring oscillators do not operate by analyzing AC stressed device characteristics.