• Title/Summary/Keyword: ELA(Excimer Laser Annealing)

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Characteristics of Excimer Laser-Annealed Polycrystalline Silicon on Polymer layers (폴리머 위에 엑시머 레이저 방법으로 결정화된 다결정 실리콘의 특성)

  • Kim, Kyoung-Bo;Lee, Jongpil;Kim, Moojin;Min, Youngsil
    • Journal of Convergence for Information Technology
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    • v.9 no.3
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    • pp.75-81
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    • 2019
  • In this work, we investigated a low temperature polycrystalline silicon (LTPS) thin film transistors fabrication process on polymer layers. Dehydrogenation and activation processes were performed by a furnace annealing at a temperature of $430^{\circ}C$ for 2 hr. The crystallization of amorphous silicon films was formed by excimer laser annealing (ELA) method. The p-type device performance, fabricated by polycrystalline silicon (poly-Si) films, shows a very good performance with field effect mobility of $77cm^2/V{\cdot}s$ and on/off ratio current ratio > $10^7$. We believe that the poly-Si formed by a LTPS process may be well suited for fabrication of poly-Si TFTs for bendable panel displays such as AMOLED that require circuit integration.

Dopant-Activation and Damage-Recovery of Ion-Shower-Doped Poly-Si through $PH_3/H_2$ after Furnace Annealing

  • Kim, Dong-Min;Kim, Dae-Sup;Ro, Jae-Sang;Choi, Kyu-Hwan;Lee, Ki-Yong
    • Journal of Information Display
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    • v.5 no.1
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    • pp.1-6
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    • 2004
  • Ion shower doping with a main ion source of $P_2H_x$ using a source gas mixture of $PH_3/H_2$ was conducted on excimer-laser- annealed (ELA) poly-Si. The crystallinity of the as-implanted samples was measured using a UV-transmittance. The measured value of as-implanted damage was found to correlate well with the one calculated through/obtained from TRIM-code simulation. The sheet resistance was found to decrease as the acceleration voltage increased from 1 kV to 15 kV at a doping time of 1 min. However, it increases as the acceleration voltage increases under severe doping conditions. Uncured damage after furnace annealing is responsible for the rise in sheet resistance.

The effect of annealing method on dopant-activation and damage-recovery in ion-shower-doped Poly-Si using $PH_3/H_2$

  • Kim, Dong-Min;Kim, Dae-Sup;Ro, Jae-Sang;Choi, Kyu-Hwan;Lee, Ki-Yong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1072-1075
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    • 2004
  • Ion shower doping using a source gas of $PH_3/H_2$ was conducted on excimer-laser-annealed (ELA) Poly-Si. As-implanted damage is accumulated more and more with the increase of an acceleration voltage and a doping time. In this study we found that dopant-activation is relatively a rapid kinetic-process while damage-recovery is not.

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Fabrication of Schottky barrier Thin-Film-Transistor (SB-TFT) on glass substrate with metallic source/drain

  • Jang, Hyun-June;Oh, Jun-Seok;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.343-343
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    • 2010
  • In this paper, Schottky barrier thin-film-transistors (SB-TFTs) with platinum silicide at source/drain region based on glass substrate were fabricated. Poly-silicon on glass substrates was crystallized by excimer laser annealing (ELA) method. The formation of pt-silicide at source/drain region is the most important process for SB-TFTs fabrication. We study the optimal condition of Pt-silicidation on glass substrate. Also, we propose this device as promising structure in the future.

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Electrical characteristic analysis of TEOS/Ozone oxide for gate insulator (게이트 절연막 활용을 위한 TEOS/Ozone 산화막의 전기적 특성 분석)

  • Park, Joon-Sung;Kim, Jae-Hong;Lee, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.89-90
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    • 2008
  • 본 연구에서는 PECVD(Plasma Enhanced CVD) 에서 사용하는 유해 가스인 $SiH_4$ 대신에 유기 사일렌 반응 물질인 TEOS(Tetraethyl Orthosilicate, Si$(OC_2H_5)_4)$를 이용하여 상압 화학 기상 증착법 (Atmospheric Pressure CVD, APCVD)으로 실리콘 산화막을 증착하고 박막의 조성과 특성 및 화학적, 전기적 특성들을 살펴보았다. TEOS 반응원료를 이용한 CVD 공정에서 공정 온도를 낮추기 위한 방법으로 강력한 산화제인 오존을 이용하여 공정온도를 $400^{\circ}C$이하로 낮췄으며, 유리기판 상의 ELA(Excimer Laser Annealing)처리된 다결정 실리콘 기판에 트랜지스터 소자를 제작하고, 게이트 절연막으로의 전기적 특성을 살펴보았다.

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Schottky barrier poly-Si thin film transistor by using erbium-silicided source and drain (어븀-실리사이드를 이용한 쇼트키 장벽 다결정 실리콘 박막 트랜지스터)

  • Shin, Jin-Wook;Koo, Hyun-Mo;Jung, Myung-Ho;Choi, Chel-Jong;Jung, Won-Jin;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.11a
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    • pp.75-76
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    • 2007
  • Poly-Si Schottky barrier Thin Film Transistor (SB-TFT) is manufactured with erbium silicided source/drain. High quality poly-Si film was obtained by crystallizing the amorphous Si film with Excimer laser annealing (ELA) method. The fabricated poly-Si SB-TFT devices showed low leakage current and large on/off current ratio. Moreover, the electrical characteristics were considerably improved by 3% $H_2/N_2$ gas annealing, which is attributed to the reduction of trap states at the grain boundaries and interface trap states at gate oxide/poly-si channel.

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New Analysis Approach to the Characteristics of Excimer Laser Annealed Polycrystalline Si Thin Film by use of the Angle wrapping (엑시며 레이저에 의해 형성된 다결정 실리콘 박막의 Angle wrapping에 의한 깊이에 따른 특성변화)

  • Lee, Chang-U;Go, Seok-Jung
    • Korean Journal of Materials Research
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    • v.8 no.10
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    • pp.884-889
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    • 1998
  • Amorphous silicon films of large area have been crystallized by a line shape excimer laser beam of one dimensional scanning with a gaussian profile in the scanning direction. In order to characterize the crystalline phase transition of thickness variables in excimer laser annealing(ELA), angle wrapping method was used. And also to characterize the residual stresses of crystalline phase transition in the case of angle wrapped-crystalline silicon on corning 7059 glass, polarized raman spectroscopies were measured at various laser energy density and substrate temperature. The residual stress varies from $9.0{\times}10^9$ to $9.9{\times}10^9$, and from $9.9{\times}10^9$ to $1.2{\times}10^10$dyne/${cm}^2$ of the substrate temperature at room temperature and varies from $8.1{\times}10^9$ to $9.0{\times}10^9$, and from $9.0{\times}10^9$ to $9.9{\times}10^9$dyne/${cm}^2$ of the substrate temperature at $400^{\circ}C$ as a function of direction from surface to substrate. According to the direction from the surface in liquid phase to the interface and from the interface to near the substrate in solid phase of recrystallized Si thin film, respectively. Thus, the stress is increased from(Liquid phase to solid phase) with phase transition.

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Low temperature pulsed ion shower doping for poly-Si TFT on plastic

  • Kim, Jong-Man;Hong, Wan-Shick;Kim, Do-Young;Jung, Ji-Sim;Kwon, Jang-Yeon;Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.95-97
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    • 2004
  • We studied a low temperature ion doping process for poly-Si Thin Film Transistor (TFT) on plastic substrates. The ion doping process was performed using an ion shower system, and subsequently, excimer laser annealing (ELA) was done for the activation. We have studied the crystallinity of Si surface at each step using UV-reflectance spectroscopy and the sheet resistance using 4-point probe. We found that the temperature has increased during ion shower doping for a-Si film and the activation has not been fulfilled stably because of the thermal damage against the plastic substrate. By trying newly a pulsed ion shower doping, the ion was efficiently incorporated into the a-Si film on plastic substrate. The sheet resistance decreased with the increase of the pulsed doping time, which was corresponded to the incorporated dose. Also we confirmed a relationship between the crystallinity and the sheet resistance. A sheet resistance of 300 ${\Omega}$/sq for the Si film of 50nm thickness was obtained with a good reproducibility. The ion shower technique is a promising doping technique for ultra low temperature poly-Si TFTs on plastic substrates as well as those on glass substrates.

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Characterization of channel length and width of p channel poly-Si thin film transistors (P channel poly-Si TFT의 길이와 두께에 관한 특성)

  • Lee, Jeoung-In;Hwang, Sung-Hyun;Jung, Sung-Wook;Jang, Kyung-Soo;Lee, Kwang-Soo;Chung, Ho-Kyoon;Choi, Byoung-Deog;Lee, Ki-Yong;Yi, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.87-88
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    • 2006
  • Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TFTs performance. Transfer characteristics of p-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of 2-30 ${\mu}m$ has been investigated. In this paper, we analyzed the data of p-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current ($I_{DSAT}$), and transconductance ($g_m$) of p-channel poly-Si thin film transistors with various channel lengths and widths.

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Characterization of length and width of poly-silicon thin film transistors (TFT의 길이와 두께에 관한 특성)

  • Lee, Jeoung-In;Hwang, Sung-Hyun;Jung, Sung-Wook;Jang, Kyung-Soo;Lee, Kwang-Soo;Chung, Ho-Kyoon;Choi, Byoung-Deog;Lee, Ki-Yong;Yi, Jun-Sin
    • Proceedings of the KIEE Conference
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    • 2006.10a
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    • pp.121-122
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    • 2006
  • Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TITs performance. Transfer characteristics of n-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of $2-30{\mu}m$ has been investigated. In this paper, we analyzed the data of n-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current (I_{DSAT}$), and transconductance ($g_m$) of n-channel poly-Si thin film transistors with various channel lengths and widths.

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