• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 학술대회 논문집 전문대학교육위원
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• pp.108-111
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• 2007

A novel voltage sag compensator with hi-directional DC/DC converter of Electric double layer capacitor is proposed. Recently, the double-layer capacitor which is drawn attention as a new energy storage element has a lot of advantage such as no maintenance, long lifetime and quick charge/discharge characteristics with large current. This DC/DC converter is used to control the charging current to the double-layer capacitor and also used to keep the DC link voltage constant for discharge of the double-layer capacitor. Therefore, the proposed DC/DC converter has the high-efficiency controller, dynamic compensator of voltage sag is driven by this converter. Finally, experimental results show the validity of the control scheme and the ability of the dynamic voltage compensator.

• 조명전기설비학회논문지
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• 제24권9호
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• pp.36-43
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• 2010

This paper proposes a new type of voltage sag-swell compensator based on a Z-source AC-AC converter. The proposed topology employs a pulse width modulation (PWM) Z-source AC-AC converter along with a injection transformer. A safe commutation strategy is used to eliminate voltage spikes on switches without snubber circuit. During a voltage sag or swell, the proposed system controls the adding or missing voltage and maintains the rated voltage of sinusoidal waveform at the terminals of the critical loads. The proposed system is able to compensate 20[%] voltage swell and is also able to compensate 60[%] voltage sag. In order to control and detect the voltage sag and swell, the peak voltage detection method is applied. Also, the operating principles of the proposed system are described, and a circuit analysis is provided. Finally, PSIM simulation and experimental results are presented to verify the proposed concept and theoretical analysis.

• Journal of Power Electronics
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• 제14권6호
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• pp.1314-1321
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• 2014

A new simplified topology for a dynamic voltage restorer (DVR) based on direct converter with a reduced number of switches is presented. The direct converter is fabricated using only three bi-directional controlled switches. The direct converter is connected between the grid and center-tapped series transformer. The center-tapped series transformer is used to inject the compensating voltage synthesized by the direct converter. The DVR can properly compensate for long-duration, balanced, and unbalanced voltage sag and swell by taking power from the grid. The switches are driven by ordinary pulse width modulation signals. Simulation and hardware results validate the idea that the proposed topology can mitigate sag of 50% and swell of unlimited quantity.

• Journal of Power Electronics
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• 제18권1호
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• pp.34-44
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• 2018

This paper presents a pulse-width adjustment (PWA) strategy for a novel bidirectional DC-DC boost converter to improve the performance of the dynamic inductor current response. This novel converter consists of three main components: a full-bridge converter (FBC), a high-frequency isolated transformer with large leakage inductance, and a three-level voltage-doubler rectifier (VDR). A number of scholars have analyzed the principles, such as the soft-switching performance and high-efficiency characteristic, of this converter based on pulse-width modulation plus phase-shift (PPS) control. It turns out that this converter is suitable for energy storage applications and exhibits good performance. However, the dynamic inductor current response processes of control variable adjustment is not analyzed in this converter. In fact, dc component may occur in the inductor current during its dynamic response process, which can influence the stability and reliability of the converter system. The dynamic responses under different operating modes of a conventional feedforward control are discussed in this paper. And a PWA strategy is proposed to enhance the dynamic inductor current response performance of the converter. This paper gives a detailed design and implementation of the PWA strategy. The proposed strategy is verified through a series of simulation and experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.1931-1933
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• 1998

In this paper, single-phase PWM AC to AC converter that operates with unit power factor and sinusoidal input line currents is presented. The output voltage of this converter is able to be obtain step up voltage as well as step down voltage. because the converter applies to operating method of buck-boost converter. The control of this converter is performed with PI control method. By using this control method low lipples in the output current and the voltage as well as fast dynamic response are achieved.

• 센서학회지
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• 제21권1호
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• pp.1-6
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• 2012

Using a current-mode multiple reset, a current-to-voltage(I-V) converter with a wide dynamic range was produced. The converter consists of a trans-impedance amplifier(TIA), an analog-to-digital converter(ADC), and an N-bit counter. The digital output of the I-V converter is composed of higher N bits and lower bits, obtained from the N-bit counter and the ADC, respectively. For an input current that has departed from the linear region of the TIA, the counter increases its digital output, this determines a reset current which is subtracted from the input current of the I-V converter. This current-mode reset is repeated until the input current of the TIA lies in the linear region. This I-V converter is realized using 0.35 ${\mu}m$ LSI technology. It is shown that the proposed I-V converter can increase the maximum input current by a factor of $2^N$ and widen the dynamic range by $6^N$. Additionally, the I-V converter is successfully applied to a photometric sensor.

• 한국방송∙미디어공학회:학술대회논문집
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• 한국방송공학회 2009년도 IWAIT
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• pp.512-515
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• 2009

A 90-nm CMOS motion estimation (ME) processor was developed by employing dynamic voltage and frequency scaling (DVFS) to greatly reduce the dynamic power. To make full use of the advantages of DVFS, a fast ME algorithm and a small on-chip DC/DC converter were also developed. The fast ME algorithm can adaptively predict the optimum supply voltage ($V_D$) and the optimum clock frequency ($f_c$) before each block matching process starts. Power dissipation of the ME processor, which contained an absolute difference accumulator as well as the on-chip DC/DC converter and DVFS controller, was reduced to $31.5{\mu}W$, which was only 2.8% that of a conventional ME processor.

• 전기전자학회논문지
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• 제14권2호
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• pp.90-97
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• 2010

본 논문에서는 DT-CMOS(Dynamic Threshold voltage CMOS) 스위칭 소자와 DTMOS Error Amplifier를 사용한 고 효율 전원 제어 장치(PMIC)를 제안하였다. 높은 출력 전류에서 고 전력 효율을 얻기 위하여 PWM(Pulse Width Modulation) 제어 방식을 사용하여 PMIC를 구현하였으며, 낮은 온 저항을 갖는 DT-CMOS를 설계하여 도통 손실을 감소시켰다. 벅 컨버터(Buck converter) 제어 회로는 PWM 제어회로로 되어 있으며, 삼각파 발생기, 밴드갭 기준 전압 회로, DT-CMOS 오차 증폭기, 비교기가 하나의 블록으로 구성되어 있다. 제안된 DT-CMOS 오차증폭기는 72dB DC gain과 83.5위상 여유를 갖도록 설계하였다. DTMOS를 사용한 오차증폭기는 CMOS를 사용한 오차증폭기 보다 약 30%정도 파워 소비 감소를 보였다. Voltage-mode PWM 제어 회로와 낮은 온 저항을 스위칭 소자로 사용하여 구현한 DC-DC converter는 100mA 출력 전류에서 95%의 효율을 구현하였으며, 1mA이하의 대기모드에서도 높은 효율을 구현하기 위하여 LDO를 설계하였다.

• Journal of Power Electronics
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• 제15권1호
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• pp.39-53
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• 2015

This paper presents the regulation of the output voltage and inductor currents in a Single Ended Primary Inductor Converter (SEPIC), operating in the continuous conduction mode (CCM) using a sliding mode controller. Owing to the time varying nature of the SEPIC converter, designing a feedback controller is a challenging task. In order to improve the dynamic performance of the SEPIC, a Sliding Mode Controller (SMC) is developed. The developed SMC is designed by using a state space average model. The performance of the developed controller with the SEPIC converter is validated at different working conditions through Matlab simulations. It is also compared with the performance while using a PI controller. The results show that the designed controller gives very good output voltage regulation under different operating conditions such as a varying input voltage, changes in the load and component variations. A 48V, 46W experimental setup for has been developed in an analog platform to validate the performance of the proposed SMC.

• Journal of Electrical Engineering and Technology
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• 제9권5호
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• pp.1551-1561
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• 2014

Design, Simulation and experimental analysis of closed loop time domain based Discrete PWM buck-boost converter are described. To improve the transient response and dynamic stability of the proposed converter, Discrete PID controller is the most preferable one. Discrete controller does not require any precise analytical model of the system to be controlled. The control system of the converter is designed using digital PWM technique. The proposed controller improves the dynamic performance of the buck-boost converter by achieving a robust output voltage against load disturbances, input voltage variations and changes in circuit components. The converter is designed through simulation using MATLAB/Simulink and performance parameters are also measured. The discrete controller is implemented, and design goal is achieved and the same is verified against theoretical calculation using LabVIEW.