• IEIE Transactions on Smart Processing and Computing
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• v.3 no.4
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• pp.246-250
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• 2014

Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. This paper presents a multi-touch detection algorithm using an efficient noise compensation technique for large mutual capacitance TSPs. The sources of noise are presented and analyzed. The algorithm includes the steps to overcome each source of noise. The algorithm begins with a calibration technique to overcome the TSP mutual capacitance variation. The algorithm also overcomes the shadow effect of a hand close to TSP and mutual capacitance variation by dynamic threshold calculations. Time and space filters are also used to filter out ambient noise. The experimental results were used to determine the system parameters to achieve the best performance.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1448-1451
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• 2008

In this paper we investigate, on the basis of experimental data, the correlations between contamination issues occurring during production process steps and final PDP operational parameters: these reciprocal relations are the result of dynamic equilibria established within the PDP system, amongst residual gases and sorbed species interacting with heat, ions and photons.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.627-628
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• 2008

We have studied the optical performance of flexible polymer network liquid crystal (PNLC) films at various bending states. Different measurement setups, wide and narrow opening angles of detector, were used to collect scatting light of PNLC films. The optical and dynamic properties of bent PNLC implied the change of LC domains.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.564-568
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• 2006

Smooth picture module is operated by vibration to tilt the light from the DMD (digital micro mirror device) of DLP projection TV, which makes the screen of the TV smoother and DMD chip cost lower. To satisfy the vibration characteristics of smooth picture module, it is designed by optimizing moment of inertia, spring constant and damping coefficient, using structural and fluid dynamic simulation that showed a good agreement with experimental data. To reduce the material cost and moment of inertia, engineering plastic is used and the reliability is estimated. A VCM (voice coil motor) type actuator for smooth picture has to satisfy performance requirements such as higher driving force, lower power consumption, and lower cost. The initial design and optimization for VCM was performed using FE analysis. It allowed us to optimize the design of magnetic circuit of the proposed actuator to obtain higher force while maintaining a lower cost.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.858-861
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• 2006

In this paper we model the liquid crystal director field in the Patterned Vertical Alignment (PVA) LC using the fast Q-tensor method, which can model multidimensional director configurations with defects in the liquid crystal director field. We observed the dynamic behaviors of the defect experimentally by applying the voltage and modeled the LC director field with defect in the active area of the PVA cell. As a result, we could also calculate the optical transmittance.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1081-1086
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• 2005

Dynamic behavior of carbon nanotubes (CNTs) in an electric field is directly observed by in-situ transmission electron microscopy (TEM). The CNT field emitters examined by in-situ TEM are multiwalled, double-walled and single walled CNTs. Threshold fields for electron emission and sustainable emission currents depending on the structure of CNTs are presented, and degradation mechanism of the CNT field emitters is discussed. In addition to the microscopy studies on individual CNTs, our recent development in surface treatment of CNT layers grown by chemical vapor deposition, which brings about high density of emission current and high uniformity, is also presented.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1398-1401
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• 2006

Silver paste curing process is very important in LCoS panel manufacture because incomplete curing process will cause poor bonding strength and increase resistance. The imperfection situation results in poor reliability and the variation of the common voltage, respectively. The change of the common voltage causes image flicker. According to Kinetics, we acquire activation energy by using dynamic DSC and compare two kinds of silver paste. From the result of isothermal DSC, we get optimum curing parameters to solve the flicker problem caused of incomplete curing of the silver paste.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.54 no.4
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• pp.161-165
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• 2005

Need of a dimmer function becomes more important with increasing interest on a HDTV for home theater applications. In a conventional AC PDP, a possible method to reduce luminance of a whole Panel is to reduce a total number of sustain pulses and then to change the gray level. However, the reduction of the total sustain number causes the step of luminance to be rough. Moreover, it is impossible to control the luminance of the panel for a given gray level. In this paper, a simple and robust method is proposed to control linearly the luminance of whole panel by applying the asymmetric sustain pulses in the display period of the ADS driving scheme. As the range of luminance control by the proposed method is about $50\%$ for a given gray level. Moreover, it is experimentally verified that the proposed method shows similar dynamic margin performances compare with the conventional method.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.11
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• pp.541-545
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• 2002

This paper proposes the new narrow erase method to erase wall charges formed in an AC plasma display panel (PDP) cell. In the proposed method, pulse timing of switch at the sustain period is adjusted for inducing, a weak discharge. Then, after the narrow erase, the voltage of the X electrode is set to differ from that of the Y electrode. For the proposed method, the measured maximum address voltage margin was 38.3V at Y_Rest voltage of 100V and sustain voltage of 180${\sim}$185V. However, for the conventional method, in which the X and Y electrodes are set to be of equal voltage after the narrow erase, the measured maximum address voltage margin was 31.3V at Y_Rest voltage of 150V and sustain voltage of 180V. This result shows that the measured maximum voltage margin for the proposed method is about 7V(22%) higher than that for the conventional method.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.907-910
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• 2003

We have developed Logic Design Training Kit for studying, actual training, designing of FPGA(Xillinx) or CPLD(ALTERA CPLD), the Digital Logic Device. This training kit has 12 matrix keys, RS232 port for serial communication and uses LED array. six FND(Dynamic), LCD as display part. That is standard specification for digital logic training kit. Special point of this kit is that we make two logic device trainig kit. This two logic device kit have more smaller and simple architecture because only uses one chip. That chip already includes a lot of functions that need for training kit, such as : complex logic circuit needed the two kind of logic devices, 16 way of system clock deviding function, serial communication interrupt....etc. We called that one chip is Center Bridge Chipset ; Xillinx FPGA Spartan2. User can select between using one device of FPGA or CPLD, or uses both them. Because of, Center Bridge Chipset has profitable architecture. it can work as Logic Device's networking with Master-Slave connection When using both logic devices.